Naga Brahmendra Yadav Gorla

Conventional solid-state transformer (SST) architectures based on the cascaded H-bridge converter typically require large high-voltage side capacitors to suppress low-frequency voltage ripples. These capacitors are further stressed during load transients, complicating efforts to reduce their capacitance. Large capacitor banks increase system footprint and reduce reliability, especially with high-power-density electrolytic capacitors. The capacitors absorb transient power imbalance between the input and output ports of an SST. Conventional control strategies often lead to uneven distribution of transient energy, placing disproportionate stress on certain capacitors and resulting in oversized capacitance requirements. To address these challenges, this article proposes a reserve-energy-aided control strategy for effective energy distribution across DC-link capacitors in low-capacitance SSTs. The proposed solution is validated using a 1-kVA, 230-V/250-V, 50-kHz single-phase SST prototype, demonstrating improved transient response and operational stability under varying load conditions.

Single-phase inverters are frequently employed in several applications with redundant switches, legs, or modules in the circuit. In this article, a transition scheme is developed which uses a redundant leg to achieve two distinct goals namely ripple compensation and fault tolerance in the inverter unit. To account for the second-harmonic ripple (SHR) using a redundant leg, a prefault control technique is created which ensures 0% to 100% compensation of the SHR in the dc-link current, minimizing the stress on the dc-link capacitor. On occurrence of a fault, the transition scheme securely switches the inverter operation from the prefault condition (ripple compensation mode) to the postfault correction (fault-tolerant mode) in the preparation stage using the same redundant leg. The inclusion of connecting devices and the modifications on the ac side filter are competent with the prefault and the postfault condition. The proposed transition and the correction scheme are tested on a single-phase inverter for different fault conditions.

The inevitable issue of parameter mismatch in single-stage cascaded isolated medium-voltage AC - low-voltage DC (MVAC-LVDC) converters, proposed for MV utility-grid interfacing in compact electric-vehicle ultra-fast charging-station (EV-UFCS) solutions, leads to unbalanced power transfer and losses in the constituting submodules. This paper analyses the drawbacks of the conventional power balance control (PBC) approach and proposes a multi-objective optimal analytical balance control (MOABC) as a remedy. The analysis of PBC strategy reveals its non-optimal pulse-width and phase-shift evaluation, leading to imbalance in losses (due to dissimilar ZVS modulations) and current stresses in the constituting submodules. The proposed MOABC follows an analytical solution approach to fulfill multiple objectives of LVDC bus voltage tracking, maximizing ZVS range of front-end (FE) and back-end (BE) MOSFETs, equalizing conduction losses among submodules and restricting grid-side current harmonics as per grid-code limits. An 11.7 kVA(pk) experimental setup is used where the proposed MOABC is implemented directly on Xilinx Z-7030 microprocessor, and the test results verify each objective’s accomplishment. Experimental comparison of MOABC with other control methods clearly present the proposed method’s advantages.

The architecture of solid-state transformers (SSTs) is usually comprised with three-stage cascaded converters. The control of cascaded multistage SSTs is conventionally designed considering decoupled stages. Furthermore, the isolating stage, which is typically implemented with dual active bridge converters, employs a closed-loop control with a much larger bandwidth (BW) than the ac–dc stage. This disparity in the BWs can put a strain on the intermediate dc-link capacitors that connect the ac–dc and isolating stages, resulting in large capacitor voltage excursions when the load changes. In fact, this can result in ac–dc stage overmodulation and even large current overshoots through the isolating stage's high-frequency transformers. This necessitates advanced SST control strategies that can mitigate the aforementioned challenges. This article proposes a control design in which the state variables are selected as the sum of capacitor energies and differences in capacitor energies. Unlike the state-of-the-art SST controllers, the proposed integrated control approach creates a more balanced and safe distribution of energies among the dc-link capacitors during load transients. The control design is simplified as the difference in the control-loop BWs between the stages does not affect this disturbance attenuation ability. The effectiveness of the proposed control is demonstrated by experiments using a 1-kVA SST with two strings.

Pulse-width modulation (PWM) strategies for brushless dc (BLdc) drives, namely unipolar and bipolar schemes, focus on optimizing either torque ripple, efficiency or vibration performance. Adoption of wide bandgap (WBG) devices such as silicon carbide (SiC) for high-voltage BLdc drives has further improved the efficiency and power density of the drive, however, the critical issue of common-mode (CM) noise in such drives is seldom investigated. Therefore, the impact of two classes of PWM schemes in 120° conduction mode, viz., (i) unipolar and (ii) bipolar PWM schemes on the CM voltage is investigated in this paper. Firstly, a generalized mathematical expression for CM voltage is derived and validated through experiments for various PWM schemes in a BLdc drive. Further, the impact of CM voltage on CM current is thoroughly analyzed for 10 kHz and 100 kHz switching frequencies. The CM choke requirements with bipolar and unipolar PWM schemes for different switching frequencies are compared. Finally, the theoretical analysis is substantiated by the experimental results on a 1.5-kW, 310-V SiC-fed BLdc drive.

Flexible power point tracking (FPPT) control algorithms have been introduced in the literature to provide frequency support in low-inertia grid-connected photovoltaic (PV) systems. This is achieved by regulating the PV output power to a power reference obtained from the energy management system. Partial shading of PV arrays is a frequent phenomena that needs to be investigated for FPPT operation of PV systems. This article proposes a simple and improved secant-based global FPPT algorithm that tracks the power reference during partial shading conditions. Guaranteed and fast convergence with flexibility to operate on both sides of the global maximum power point are the main contributions of the proposed algorithm. Experimental validation is carried out to demonstrate the efficacy of the proposed algorithm.

Dual active bridge (DAB) dc-dc converter with integrated transformer is explored in recent years due to its advantages of the low component count, high power density and high efficiency. Although the operational performance of the DAB converter is well reported, the common-mode (CM) noise with the integrated transformer is yet to be thoroughly analyzed. Hence, this paper presents a detailed analysis of the CM noise performance of the DAB converter employing integrated transformer. Moreover, the conventional CM chokes incorporated to mitigate the CM noise cause a deleterious impact on volume and power density of the converter. This paper proposes a concentric CM choke that occupies less volume compared to its equivalent conventional CM choke of the same CM impedance. The analysis and design guidelines for the proposed concentric CM choke are presented. The above-mentioned analyses of the integrated transformer and the concentric CM choke are experimentally validated on a DAB converter prototype.

Three-phase matrix-based ac-dc power conversion has recently gained popularity, considering its higher conversion efficiency and power density compared to the conventional two stage solutions. In the literature, several modulation strategies have demonstrated improved total harmonic distortion (THD) of the ac current in the matrix converters through independent control of the anti-series combination of active devices that form a matrix switch (i.e., two gate drivers per matrix switch). In this paper, a matrix-based ac-dc power converter that utilizes only one gate driver per matrix switch is proposed without compromising the quality of ac current. Managing energy stored in high-frequency transformer’s leakage inductor is an issue while utilizing single driver per matrix switch. An additional short-circuit leg is proposed to circulate stored energy in the leakage inductance during zero vector periods of the proposed converter, thereby ensuring continuous path for the leakage inductor’s energy flow. Steady-state analysis of the proposed ac-dc converter along with its loss modelling are presented with necessary mathematical expressions. The presented analysis and design of the proposed converter are experimentally validated on a 2 kW hardware prototype in the laboratory environment. A pertinent comparison of the proposed matrix-based conversion methodology with the conventional matrix-based conversion strategy is also provided.

The dual active bridge (DAB) converter is one of the widely explored topologies in recent years due to its remarkable features, such as inherent soft-switching characteristics, galvanic isolation, and high power density. However, the conducted electromagnetic interference (EMI) analysis of the DAB converter is seldom reported. In this paper, the common-mode (CM) and the differential-mode (DM) equivalent circuits of the isolated DAB converter are presented to understand the propagation mechanisms of the conducted EMI noise in the converter. In particular, the mixed-mode DM (MMDM) noise component of the DM noise is quantified for the DAB converter. Further, an experimental measurement method based on an external impedance-matched circuit is proposed to quantify the DM current due to the capacitive coupling between the primary and secondary windings of the transformer. The quantified MMDM noise and the DM noise through the transformer are estimated using the proposed equivalent circuits in MATLAB-Simulink and validated experimentally on a prototype DAB converter.

This article proposes a dual-layer modulation technique that combines two- and three-level modulation techniques to control the average neutral-point current (ANC) in neutral-point-clamped (NPC) converters. In the proposed technique, two modulation layers are employed to independently synthesize the desired ac-side voltage reference and ANC reference. The first (outer) modulating layer operates at a lower frequency and synthesizes the ANC reference from the three-phase currents. It determines the duration of applying each modulation technique, based on the ANC reference and the maximum ANC injection limits of the converter. The second (inner) modulating layer operates at the switching frequency and synthesizes the three-phase voltages of the NPC converter from the common dc voltages by comparing the calculated duty cycles and a carrier waveform. The proposed dual-layer modulation technique has advantages of faster dynamics and reduced mathematical computations compared to the conventional approach. The feasibility of the proposed modulation technique is demonstrated experimentally on a laboratory prototype. A detailed performance comparison among different modulation techniques is also presented.