WLWen-Jay Lee

Wen-Jay Lee

*This is an algorithmically generated author record based on publicly available information.

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Previous Organizations / Institutes

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Wen-Jay Lee has a total of 81 co-authors. Here are the top co-authors by number of shared publications:


Latest Publications

  • Open Access

    Interpreting artificial neural network-based modeling of 4 H-SiC mosfets using explainable AI

    by Yu-Sheng Hsiao, Pei-Jie Chang, Bang-Ren Chen, Rushat Rai, Shivendra Kumar Singh, Yogesh Singh Chauhan, Wen-Jay Lee, Nan-Yow Chen, Tian-Li Wu

    Wide bandgap (WBG) semiconductors such as 4 H-SiC MOSFETs are key enablers for next-generation power electronics due to their superior efficiency and high-temperature capability. However, their electrical performance is strongly affected by process variations, and conventional Technology Computer-Aided Design (TCAD) simulations are computationally demanding and difficult to scale. This work presents a novel explainable machine learning framework that integrates artificial neural networks (ANNs) with explainable artificial intelligence (XAI) to enable accurate and interpretable device modeling. The ANN is trained on comprehensive TCAD-generated datasets covering a broad range of structural and doping parameters, while SHapley Additive exPlanations (SHAP) are employed to quantify the influence of each design parameter on electrical characteristics. The proposed model achieves a Pearson correlation coefficient exceeding 0.99 for on-state current prediction, and SHAP analysis reveals physically consistent trends such as the inverse dependence of drain current on oxide thickness and channel length. This study is among the first to apply XAI for interpreting design–performance correlations in SiC MOSFETs, establishing a transparent and data-driven framework for device understanding and optimization. The methodology can be readily extended to other semiconductor technologies where both modeling accuracy and interpretability are essential.


  • Open Access

    Demonstration of accurate ID-VG characteristics modeling in SiC mosfets using separated artificial neural networks with small training dataset

    by Manopat Chankla, Bang-Ren Chen, Shivendra Kumar Singh, Yogesh Singh Chauhan, Wen-Jay Lee, Nan-Yow Chen, Songphol Kanjanachuchai, Tian-Li Wu

    This study developed a novel approach based on separated artificial neural networks (ANNs) to efficiently and accurately model the drain current (ID)–gate voltage (VG) characteristics of silicon carbide (SiC) power MOSFETs efficiently and accurately. We found that a single ANN cannot model the entire ID–VG range under a large ON/OFF current ratio (10− 12 to 10− 1 mA/mm), which is often observed in wide-bandgap semiconductor technologies, such SiC MOSFETs. To address this problem, we developed a method that involves using two ANNs, one each for the ON- and OFF-states. A transition layer is also used to model the transition between the ON- and OFF-states. We evaluated our method on training datasets of various sizes. This method achieved a coefficient of determination (R2) exceeding 99.96% on 3000 ID–VG curves when training was conducted using only 150 randomly selected curves, with a modeling time of less than 10 s. Our approach can thus be used to accurately and efficiently model the ID–VG characteristics of semiconductor devices with large ON/OFF current ratios, such as SiC MOSFETs.


  • Open Access

    Numerical Simulations of Gate-Granularity- Induced Subthreshold Characteristics Deterioration of MOSFETs Magnified at Cryogenic Temperatures

    by Kuo-Hsing Kao, Zong-Hong Wang, Yu-Chia Pai, Chen-Chi Cheng, Darsen D. Lu, Wen-Jay Lee, Nan-Yow Chen

    While gate workfunction fluctuation causes the threshold voltage shift of transistors, it leads to off- and on-state current variations with a given supply voltage and circuit performance degradation at room temperatures. However, the impacts of gate workfunction fluctuation on device electrical characteristics at cryogenic temperatures are still unclear yet. Based on self-consistent numerical simulations, we report in this work that cryogenic operation of n-channel transistors magnifies the influence of gate granularity on the device performance variation in terms of threshold voltage, subthreshold swing and drain currents. Gate granularity roughens the channel potential landscape and forms the local minima on the conduction band for electron transport, and which effectively reduces the device channel width. Our results highlight current deterioration in the subthreshold and weak inversion regions at cryogenic temperatures due to gate granularity. It may result in subthreshold swing saturation at cryogenic temperatures and pose a challenge to supply voltage scaling for power management. Device physics is explained and potential solution is discussed in this paper.


  • Open Access

    Using U-Net convolutional neural network to model pixel-based electrostatic potential distributions in GaN power MIS-HEMTs

    by Bang-Ren Chen, Yu-Sheng Hsiao, Wei-Cheng Lin, Wen-Jay Lee, Nan-Yow Chen, Tian-Li Wu

    This study demonstrates a novel use of the U-Net convolutional neural network (CNN) for modeling pixel-based electrostatic potential distributions in GaN metal–insulator-semiconductor high-electron mobility transistors (MIS-HEMTs) with various gate and source field plate designs and drain voltages. The pixel-based images of the potential distribution are successfully modeled from the developed U-Net CNN with an error of less than 1% error relative to a TCAD simulated reference of a 500-V electrostatic potential distribution in the AlGaN/GaN interface. Furthermore, the modeling time of potential distributions by U-Net takes about 80 ms. Therefore, the U-Net CNN is a promising approach to efficiently model the pixel-based distributions characteristics in GaN power devices.


  • Open Access

    Mixing entropy and enthalpy effects on europium ions in Eu-doped BaAl2O4

    by Yu-Hao Wu, Tu-Ngoc Lam, Sun-Way Ke, Wen-Jay Lee, Chien-Yu Lee, Bo-Yi Chen, Gung-Chian Yin, Wan-Zhen Hsieh, Ching-Yu Chiang, Mau-Tsu Tang, et al.

    Distributions of Eu2+ and Eu3+ do affect the optical properties. However, the substitution of the activator ions hardly perturbed the crystal structure of the host lattice. Without the differences in crystal structure, it is not trivial to develop an effective descriptor to investigate stoichiometry-dependent mechanism to explore the effects of Eu species on valence states. In this study, through x-ray nanodiffraction, x-ray fluorescence, x-ray absorption near edge structure, and x-ray excited optical luminescence, we mapped the valence state distributions of Eu species to calculate the local mixing enthalpy and entropy. The calculated thermodynamics parameters show good agreement with the optical properties. We found that Eu2+ of Eu-doped BaAl2O4 predominantly existed in a divalent state, which results in segregation phenomena of local Eu2+ and Eu3+ ions.


  • Open Access

    Using Graph Attention Network to Reversely Design GaN MIS-HEMTs Based on Hand-Drawn Characteristics

    by Yi-Ming Tseng, Bang-Ren Chen, Wei-Cheng Lin, Wen-Jay Lee, Nan-Yow Chen, Tian-Li Wu

    In this work, the methodology using Graph Attention Network (GAT) for the reserve design in GaN power MIS-HEMTs based on hand-drawn characteristics is demonstrated for the first-time. The hand-drawn I D -V G characteristic is constructed by Ramer-Douglas-Peucker algorithm. Then, the extracted information is sent to the Graph Attention Network to receive the corresponding device design variables, including t AiGaN , recessed depth, Al%, L g , L gd , and L gs . Less than 30 seconds is consumed to generate the design variables and less than 8% of the differences in the key extracted parameters, such as threshold voltage (V th ), On-state current (I on ), and subthreshold slope (SS), can be achieved by comparing hand-drawn I D -V G and simulated I D -V G characteristic based on the design variables from GAT model. Therefore, the developed GAT approach is promising for the reverse design of GaN power MIS-HEMTs, which can provide users with efficient and valuable design suggestions to optimize the devices toward the targeting performance.


  • Impact of lattice plane orientation in TiO2 based resistive switching memory: A computational approach

    by Yu-Li Chen, Babu Balraj, Pei-Fang Chung, Chandrasekar Sivakumar, Wen-Jay Lee, Mon-Shu Ho

    Resistive Random Access Memories (ReRAMs) are promising future candidates for nonvolatile memory. The underlying mechanism involves resistive switching in high-k dielectric layers, and changes in resistance due to different mechanisms are caused by the evolution of defective structures triggered by electrical and thermal effects. For the memory purpose of the ReRAM, the electrical field can be used to adjust the resistance of the resistance material for the storage of information. In this study, nonequilibrium molecular dynamics simulations with the charge equilibration method are used to study the electrochemical reactions of ReRAMs. The Cu/TiO2/Ti heterojunction structures with (100)/(001), (100)/(110), (100)/(111), and (100)/(120) lattice planes as grains are considered to investigate the resistive switching properties based on the electrical, thermal, and structural properties of three models. Dielectric layers with the grain boundary of the bicrystal structure are composed of titanium dioxide nanoparticles. Our results demonstrate that an applied external electric field on grain boundaries is a key issue in resistive switching. Furthermore, the simulation results were verified with the experimental data. Overall, this simulation work provides details of the fundamental mechanism of resistance switching, including variation of the atomic structure and electronic properties, at the atom length scale and picosecond timescale, which suggest a number of useful aspects for the future development and optimization of materials for this ReRAM technology.


  • Inherent Dipole Layer Formation Driven by Surface Energy at Nonplanar Dielectric Interface

    by Yu Fang, Wen-Jay Lee, An-Chen Yang, Guan-Peng Chen, Nan-Yow Chen, Kuo-Hsing Kao

    This work investigates the correlation between dipole formation and surface energy at a nonplanar dielectric interface on a Si nanowire (NW) by means of molecular dynamics simulations. According to the atom and charge distribution obtained by simulations, the built-in electric field and potential are calculated at the dielectric interface based on the Poisson equation. It is found that the built-in potential is dependent on the diameter of the Si NW, which is attributed to the dependence of the surface energy difference on the surface curvature of the dielectric heterointerface, driving atom diffusion and leading to a dipole layer at the interface. The impact of the built-in potential on the threshold voltage of a transistor with a multigate configuration is discussed as well.