Fariborz Parandin

In this study, a two-dimensional photonic crystal lattice comprising silicon rods in an air background is used to implement an all-optical NOR logic gate. Line-defect waveguides direct the propagating modes, while three selected rods act as defect elements to tailor the device response. To attain optimal structural performance, an optimization-based methodology is adopted for determining the optimal radius of the defect rods.The final structure, implemented on a square-lattice platform, occupies only 79µm ² , enabling dense photonic integration. Simulation results exhibit an extremely low propagation delay from input to output, attributed to the short optical path and the simplicity of the defect rods. The proposed NOR gate achieves a normalized power difference of 0.67 between logic states. This high power contrast, combined with the compact footprint and straight waveguides, minimizes gate delay and yields an estimated bit rate of 1.67 Tb/s. These features make the design highly suitable for high-speed photonic circuits, offering low detection error and seamless compatibility with on-chip integration platforms.

The continuous demand for faster processing systems, driven by the rise of artificial intelligence, has exposed limitations in traditional transistor-based electronics, including quantum tunneling, heat dissipation, and switching delays due to challenges in further miniaturization. This study explores optical systems as a promising alternative, leveraging the speed of photons over electrons. Specifically, we design and simulate optical NAND and NOR logic gates using a two-dimensional photonic crystal structure with a square lattice. Symmetrical waveguides are used for the input paths to make the structure relatively more straightforward to fabricate. A key innovation is the ability to realize both gates within a single structure by adjusting the phases of the input sources. To optimize the phase parameters efficiently, we employ the ML-FOLD (Meta-Learning and Formula Optimization for Logic Design) optimization formula, which outperforms traditional methods and machine learning approaches in terms of computational efficiency and data requirements. Through finite-difference time-domain (FDTD) simulations, the proposed optical structure demonstrates successful implementation of NAND and NOR gate logic, achieving high contrast ratios of 4.2 dB and 4.8 dB, respectively. The results validate the effectiveness of the ML-FOLD method in identifying optimal configurations, offering a streamlined approach for the design of all-optical logic devices.

This paper investigates a novel scheme to realize all-optical 2 × 4 decoders (AODEC) utilizing linear and nonlinear 1 × 2 decoders in a two-dimensional photonic crystal’s platform. The design method of the recommended structure is a combination of threshold switching and beam interference, leading to its efficient operation. The T-shaped nonlinear ring resonator (T-NRR) is employed to realize the suggested nonlinear devices. These AODECs are implemented using a cubic lattice of silicon dielectric rods with a lattice constant of 595 nm in an air substrate. The radius and refractive index of rods were noted as 119 nm and 3.46, respectively. The proposed structures’ forbidden photonic band gap region is calculated using the plane wave expansion (PWE) method, and their required performance metrics are analyzed using the finite difference time domain (FDTD) technique. The efficiency of the proposed AODEC is examined by several parameters such as contrast ratio (CR), fall, rise and delay times (Tr, Tf, Td), bit rate (BR), optical intensity (OI) and total footprint (TF). The results of the FDTD technique show that the proposed all-optical 2 × 4 decoder attained a good CR of 9.12dB and low Td of 1.5ps with an operating speed of 667 Gbit/s.