Fávero Guilherme Santos

MEMS gyroscopes are increasingly demanded by modern applications such as autonomous navigation, consumer electronics, and defense systems, where high stability, linearity, and robustness against environmental variations are critical. This work presents the design, modeling, and simulation of a symmetric, intrinsically mode-matched, and wafer-level fully-sealed MEMS gyroscope technology, where a single proof mass participates in both drive-and sense-mode oscillations to facilitate mode-matching and reduce quadrature errors. Hermetic wafer-level sealing at 5 mBar combined with slide-film dynamics suppresses viscous damping, making thermoelastic dissipation (TED) the dominant loss mechanism and enabling a quality factor largely insensitive to temperature variations. Multiphysics simulations confirmed resonance frequencies around 40.75 kHz, quality factors above 5900, linear operation between 2.0-6.0 rad/s with enhanced sensitivity under higher excitation, and a stable baseline capacitance of 515.36 fF. Robustness to process variations was verified through sidewall angle (SWA) analysis, where only uniform deviations caused significant resonance shifts and Q reduction, while bandwidth stability remained within 0.07% across the automotive temperature range (for a constant Young's modulus). These results establish a robust methodology for high-performance, reproducible MEMS gyroscopes suitable for inertial navigation applications demanding stability, linearity, and resilience to environmental and process variations.

In recent years, many chaos-based encryption algorithms have been proposed. Many of these are based on established designs and populate their S-boxes with values derived from chaotic maps, following conventional implementation strategies to enable comparison with their original non-chaotic counterparts. In contrast, this work proposes a novel approach: a Chaos-Based Substitution Box (CB-SBox) implementation, in which conventional ROM-based S-boxes are replaced by a digital circuit that directly executes a selected chaotic map. This method enables the construction of S-boxes with long word lengths through an FPGA-based programmable circuit that allows for variable S-box lengths, facilitating the analysis of S-boxes of varying sizes, and ultimately enhancing security, particularly for larger S-boxes, as demonstrated by increased resistance to linear and differential cryptanalysis. Furthermore, the proposed CB-SBox achieves reductions in both area and power consumption compared to size-comparable ROM-based S-boxes. A 19-bit chaos-based S-box consumes just 0.0238% of the area and 0.0241% of the power required by an equivalent ROM-implemented S-box while providing the same level of security. The inherent unpredictability of non-linear chaotic behavior causes the proposed chaos-based S-boxes to exhibit non-bijective characteristics, making them well suited for application in non-invertible cryptographic primitives, such as hash functions and Feistel networks. The proposed CB-SBox is implemented in a Feistel network as described in the literature, and the results are provided.