Annis Fathima Aklak
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Research Subjects
Annis Fathima Aklak has a total of 20 co-authors. Here are the top co-authors by number of shared publications:
- Abhishek Sebastian
Vellore Institute of Technology
3 shared publications - Pragna Rakesh
Vellore Institute of Technology
3 shared publications Chrishia Christudhas
2 shared publications- S. Madhan Kumar
Vellore Institute of Technology
2 shared publications - Vinay Murali
School of Mechanical Engineering, Vellore Institute of Technology, Chennai, India
2 shared publications - Chrishia Christudhas
VIT Chennai
1 shared publication
Latest Publications
- 27 November 2025
- Published by Springer Nature in Circuits, Systems, and Signal Processing
- Vol. 45 (6) , 4761-4781
VLSI Implementation of a Non-linear Noise Filtering Technique Using an Efficient Median Selector Architecture
- 27 November 2025
- Published by Springer Nature in Circuits, Systems, and Signal Processing
- Vol. 45 (6) , 4761-4781
VLSI Implementation of a Non-linear Noise Filtering Technique Using an Efficient Median Selector Architecture
- Open Access
- 24 February 2025
- Published by Elsevier in Results in Engineering
- Vol. 25
Recent trends in pixel-based image enhancement techniques using VLSI cores – a review
- 24 February 2025
- Published by Elsevier in Results in Engineering
- Vol. 25
Open AccessRecent trends in pixel-based image enhancement techniques using VLSI cores – a review
- Open Access
- 29 November 2024
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Access
- Vol. 12, 182737-182751
Design of Capsule-Shaped All-Terrain Robot: A Perpendicular Track Mobility Solution
The Capsule Shape All-Terrain Robot (CS-ATR) is designed to address the challenges of navigating rough and unpredictable environments, such as disaster zones, where stability, maneuverability, and adaptability are critical. This study presents the design and development of the CS-ATR, focusing on its perpendicular dual-track system, real-time PID-controlled tilt correction mechanism specifically for capsule-shaped robots, and autoencoder-based anomaly detection system. The perpendicular dual-track system enables the robot to perform precise lateral movements, allowing navigation through confined spaces, while the PID controller ensures continuous real-time adjustments to maintain balance across uneven terrains. The variational autoencoder enhances the robot’s ability to detect and correct abnormal movements, improving overall system reliability. Extensive simulation experiments using Simscape™ were conducted to evaluate the robot’s ability to maintain balance and adapt to disturbances, such as rocks and pits. Additionally, the performance of the physical prototype was tested on various terrains, including river sand, rocky paths, and simulated pits, to validate its operational effectiveness in real-world conditions. The results demonstrate that CS-ATR effectively overcomes obstacles, maintains stability, adapts to changes in traction, and corrects anomalies, making it a promising solution for applications such as search and rescue missions.
- 29 November 2024
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Access
- Vol. 12, 182737-182751
Open AccessDesign of Capsule-Shaped All-Terrain Robot: A Perpendicular Track Mobility Solution
The Capsule Shape All-Terrain Robot (CS-ATR) is designed to address the challenges of navigating rough and unpredictable environments, such as disaster zones, where stability, maneuverability, and adaptability are critical. This study presents the design and development of the CS-ATR, focusing on its perpendicular dual-track system, real-time PID-controlled tilt correction mechanism specifically for capsule-shaped robots, and autoencoder-based anomaly detection system. The perpendicular dual-track system enables the robot to perform precise lateral movements, allowing navigation through confined spaces, while the PID controller ensures continuous real-time adjustments to maintain balance across uneven terrains. The variational autoencoder enhances the robot’s ability to detect and correct abnormal movements, improving overall system reliability. Extensive simulation experiments using Simscape™ were conducted to evaluate the robot’s ability to maintain balance and adapt to disturbances, such as rocks and pits. Additionally, the performance of the physical prototype was tested on various terrains, including river sand, rocky paths, and simulated pits, to validate its operational effectiveness in real-world conditions. The results demonstrate that CS-ATR effectively overcomes obstacles, maintains stability, adapts to changes in traction, and corrects anomalies, making it a promising solution for applications such as search and rescue missions.
- Open Access
- 19 November 2024
- Published by Springer Nature in Scientific Reports
- Vol. 14 (1) , 1-13
VLSI implementation of a modified min-max median filter using an area and power competent tritonic sorter for image denoising
The prominence of image processing in today’s cutting-edge technology is undeniable. Integrating software with hardware leverages both strengths, resulting in a real-time processing system that is efficient and streamlined. Raw images are usually affected by noise, which hinders the acquisition of good-quality and detailed images; hence, denoising becomes necessary. This paper proposes a modified min-max median (MMM) filter to remove impulse noise and a Tritonic sorter to localize corrupted pixels. The proposed denoising method focuses on localizing noisy pixels, unlike traditional denoising approaches, which focus only on noise detection and filtering. A min-max sheet provides the location of the corrupted pixels, and filtering is performed on them. The Tritonic Sorter, consisting of a max locator and a min locator, compares three input values and finds the minimum, maximum and median values among them. Compared to other state-of-the-art methods, the proposed method minimizes the number of comparators needed to carry out the sorting process. The proposed method was synthesized in the ZedBoard Zynq kit using the Vivado tool. The results show that the area improved by 27%, and the power improved by 16.23% compared with those of the existing method.
- 19 November 2024
- Published by Springer Nature in Scientific Reports
- Vol. 14 (1) , 1-13
Open AccessVLSI implementation of a modified min-max median filter using an area and power competent tritonic sorter for image denoising
The prominence of image processing in today’s cutting-edge technology is undeniable. Integrating software with hardware leverages both strengths, resulting in a real-time processing system that is efficient and streamlined. Raw images are usually affected by noise, which hinders the acquisition of good-quality and detailed images; hence, denoising becomes necessary. This paper proposes a modified min-max median (MMM) filter to remove impulse noise and a Tritonic sorter to localize corrupted pixels. The proposed denoising method focuses on localizing noisy pixels, unlike traditional denoising approaches, which focus only on noise detection and filtering. A min-max sheet provides the location of the corrupted pixels, and filtering is performed on them. The Tritonic Sorter, consisting of a max locator and a min locator, compares three input values and finds the minimum, maximum and median values among them. Compared to other state-of-the-art methods, the proposed method minimizes the number of comparators needed to carry out the sorting process. The proposed method was synthesized in the ZedBoard Zynq kit using the Vivado tool. The results show that the area improved by 27%, and the power improved by 16.23% compared with those of the existing method.
- 1 August 2024
- Published by Springer Nature
- p. 158-171
Calorie Burn Estimation in Community Parks Through DLICP: A Mathematical Modelling Approach
- 1 August 2024
- Published by Springer Nature
- p. 158-171
Calorie Burn Estimation in Community Parks Through DLICP: A Mathematical Modelling Approach
- 19 May 2023
- Published by Springer Nature
- p. 251-259
VLSI Implementation for Noise Suppression Using Parallel Median Filtering Technique
- 19 May 2023
- Published by Springer Nature
- p. 251-259
VLSI Implementation for Noise Suppression Using Parallel Median Filtering Technique
- 4 April 2023
- Published by Springer Nature in Pattern Analysis and Applications
- Vol. 26 (3) , 889-906
Visual object tracking via adaptive deep feature matching and overlap maximization
- 4 April 2023
- Published by Springer Nature in Pattern Analysis and Applications
- Vol. 26 (3) , 889-906
Visual object tracking via adaptive deep feature matching and overlap maximization
- 31 March 2022
- Published by Springer Nature
- p. 347-358
A Vision-Based System Facilitating Communication for Paralytic Patients
- 31 March 2022
- Published by Springer Nature
- p. 347-358
A Vision-Based System Facilitating Communication for Paralytic Patients
- 29 November 2021
- Published by Wiley in Concurrency and Computation: Practice and Experience
- Vol. 34 (10) , e6734
A study on VLSI implementation of image enhancement techniques
In real‐time, the images captured are not always appreciable for visual perception. The quality of the image relies on the illumination condition. Contrast enhancement is required to improve the visual quality of the image. In this article, the image enhancement techniques that are adaptable for real‐time images are studied. Further, an investigation is done on implementing the image processing algorithms in very large‐scale integration (VLSI) hardware. As the image data are comparatively larger, the computational complexity and the memory requirement are more. From the study, the need for efficient computation of such image processing algorithms is realized. The efficient computation of image processing algorithms on hardware platforms, in particular on field programmable gate array (FPGA), is reviewed. As an experiment, the gamma‐transformation technique used for image enhancement is realized. Initially, the prototype is modeled using MATLAB, and then it is implemented using an FPGA.
- 29 November 2021
- Published by Wiley in Concurrency and Computation: Practice and Experience
- Vol. 34 (10) , e6734
A study on VLSI implementation of image enhancement techniques
In real‐time, the images captured are not always appreciable for visual perception. The quality of the image relies on the illumination condition. Contrast enhancement is required to improve the visual quality of the image. In this article, the image enhancement techniques that are adaptable for real‐time images are studied. Further, an investigation is done on implementing the image processing algorithms in very large‐scale integration (VLSI) hardware. As the image data are comparatively larger, the computational complexity and the memory requirement are more. From the study, the need for efficient computation of such image processing algorithms is realized. The efficient computation of image processing algorithms on hardware platforms, in particular on field programmable gate array (FPGA), is reviewed. As an experiment, the gamma‐transformation technique used for image enhancement is realized. Initially, the prototype is modeled using MATLAB, and then it is implemented using an FPGA.