Agata Lachowicz

The use of cut-cells in most of the current modules is now the norm to maximise the final product performances. But the integration of such new cell configurations also comes with new challenges, especially if small cell size dimensions such as shingle are considered. Indeed, specific edge passivation processes are often used to recover for the cut-cell losses. Alumina Oxide or Polymer deposition are the most studied approaches, with in general promising benefits proven at cell level. However, only few communications after module integration are available, in particular about the impact of these additional layers on final module reliability. We show for example that it is crucial to avoid direct deposition of AlOX over the cell metal pattern in the future interconnection area, as TC (Thermal Cycling) resilience of such modules is clearly degraded. Proper edge localization of the AlOX layer is needed to recover the initial reliability behaviour. To preserve the interconnection quality, three different approaches are investigated: (1) edge localisation of the layer by wafer stacking during deposition (2) introduction of adapted copper plating solutions allowing metal growth through the passivation layer (3) edge passivation process directly applied on final strings just before lamination.

: Mini-module aging tests with differently interconnected heterojunction solar cells having industrially viable copper metallization are presented. The plating process comprises 3 steps: firstly, screen printing of a seed-grid layout using a copper-based paste, followed by deposition of a dielectric layer over the entire wafer surface, and finally, selective copper electrodeposition on grid positions. Modules with Smartwire interconnection, fabricated with M6 half-cells, are stable in extended TC and PID tests. DH degradation is at 5% after 2700 h (glass-glass modules without edge sealing). Shingle modules, realized in collaboration with CEA INES and AMAT, exhibit notably higher fill factor compared to reference modules with screen-printed silver paste. This improvement is attributed to the superior line conductivity achieved with plated copper. TC stability of shingle modules is very good, whereas after 2000 h damp-heat aging more than 2% loss in fill factor is observed. Using pattern-transfer-printing technology narrow, high aspect-ratio lines have been obtained: with a seed-grid of pure copper paste, reinforced with electrodeposited copper. Line dimensions and line resistance as well as first cell results are presented.

For the current PV production about 2000 tons of silver are consumed per year, 10% of the entire world annual silver supply. The PV production is expected to grow significantly in the next decades in order to enable the energy transition to 100% renewables. Annual production volumes in the terawatt range are predicted already for 2030 and this may lead to higher silver price and put more pressure on the industry to replace silver by copper. Within the Ameliz project several patterning approaches for copper electrodeposition on heterojunction cells are developed: firstly, patterning by printing a metal seed grid with a dielectric layer as plating mask and secondly masking by a monolayer of self-assembling molecules. These molecules consist of a phosphonic acid group and a hydrocarbon chain. They are bonded to the ITO surface and form a monolayer of well-ordered, densely packed hydrophobic chains, which protects the ITO surface against plating solutions. Furthermore, methods for selective formation of a copper seed layer by electrografting and for improved adhesion by ITO reduction are being investigated.

Replacement of expensive and rare elements like silver and indium becomes necessary to sustain large scale PV production. With our copper plating process high efficiency above 24.7% has been achieved on industrial heterojunction precursors and excellent module reliability confirmed in extended aging tests. The initial process compatible with ITO has been modified for cells having an aluminum zinc oxide (AZO) electrode and first silver- and indium-free heterojunction cells have been fabricated.

Silicon heterojunction (SHJ) technology enables high performance photovoltaics at acceptable cost. In this article, we show that this technology is also well suited for low to medium concentration applications. For this purpose, SHJ cells have been optimized and tested at different illumination levels and temperatures. An interesting increase of the efficiency temperature coefficient is observed with increasing illumination level. This behavior translates in improved performances of the tested SHJ devices under low to medium concentration applications, when operated at temperature above 25°C. This is linked to the behavior of the FF, exhibiting an improvement with increasing temperature while the cell is operated under high illumination level. This phenomenon suggests thermally assisted carrier transport through a barrier probably located at the TCO/p + a-Si:H interface.