Emilie Avignon-Meseldzija

This article proposes a new integrated analog implementation of the Pan–Tompkins algorithm. This algorithm, generally implemented in the digital domain at the cost of higher power consumption, is one of the most efficient for QRS detection in electrocardiographic signals. This circuit has been designed for use on small mammals like rats for the study of pulmonary arterial hypertension. The specificities of the architecture proposed in this article are a sub-threshold-operated architecture to perform the amplification, noise filtering, and differentiation of the signal in a unique block to limit the power consumption; an analog squarer; and an analog monostable reshaping-circuit followed by a digital counter clocked by an ultra-low power relaxation oscillator. Compared with the state of the art, this circuit, designed with the X-FAB xh018 180 nm CMOS technology, presents one of the lowest power consumptions currently reported, at 28.5 nW, 76% of which is consumed in the current, voltage, and time references. Post-layout simulation results show a reliable 98.57% heart beat detection accuracy using the MIT-BIH arrhythmia database and 99.85% accuracy for healthy sinus rhythm electrocardiograms. The robustness of the circuit is also investigated, and mitigating solutions are proposed for each critical block.

U ovom radu predstavljen je unapređeni model akvizicionog sistema za elektrookulografiju (EOG), zasnovan na suvim elektrodama i jednostavnom hardverskom rešenju, namenjen primeni u okviru laboratorijskih vežbi. Cilj razvoja sistema bio je obezbediti jednostavnu, ponovljivu i ekonomičnu upotrebu, uz kompaktne dimenzije uređaja i napajanje putem standardnog USB interfejsa. Akvizicioni front-end realizovan je korišćenjem diferencijalnog pojačavača sa aktivnom povratnom spregom radi smanjenja uticaja ambijentalnog šuma. Za eliminaciju mrežne interferencije implementiran je aktivni analogni notch filter zasnovan na Bainter topologiji. Performanse predloženog rešenja upoređene su sa prethodno realizovanim pasivnim notch filterom. Rezultati pokazuju da aktivni notch filter ostvaruje uži opseg potiskivanja, bolju selektivnost i stabilnije ponašanje u odnosu na pasivnu realizaciju, uz manju osetljivost na tolerancije komponenti. Posebna pažnja posvećena je analizi uticaja neidealnosti operacionog pojačavača TL072 i tolerancija pasivnih elemenata na performanse filtera. Predloženi sistem predstavlja pouzdanu i ekonomičnu platformu za laboratorijsku nastavu i dalja istraživanja u oblasti akvizicije bioelektričnih signala.

The paper presents the design of two dispersive filters (also called phasers) dedicated to Analog Signal Processing (ASP) applications. Possible ASP applications targeted for these filters are also proposed: analog pulse compression radar, analog chirp Fourier transformer and frequency discriminator. In the past decades, dispersive filters for ASP have been implemented with Surface Acoustic Wave (SAW) filters, having a reduced bandwidth leading to a poor resolution in the applications. Consequently, designing these filters with a larger bandwidth is a significant progress and this is what is proposed in this work. The design of the two filters is described step-by-step: the mathematical method employed to optimize the parameters of the filters, the calculation of theoretical values of components and the selected real values of components of the shelves for the PCB. The two measured filters, composed of 2 passive cells, have negative slope and positive slope group delay characteristics: the first filter has a group delay downslope of -1 ns/GHz for the considered bandwidth [700MHz - 1.9GHz], and the second has a group delay upslope of 1.25ns/GHz for the considered bandwidth [500MHz-1.3GHz].

Summary: This article describes the design of a tunable positive slope linear group delay filter dedicated to analog signal processing applications. The designed filter is composed of eight second‐order all‐pass cells which have been optimized to obtain a highly linear global group delay characteristic over a specified bandwidth for a specified dispersion. Each of these second‐order cells is designed with a dedicated G_m‐C topology to fit the ideal group delay characteristic with a high efficiency. Based on the sensitivity analysis of the topology, the possibility of tuning the group delay slope is highlighted. The design has been achieved with the ST CMOS 55 nm technology and has a maximum bandwidth of 2.5 GHz, a maximum reachable delay of 5.12 ns, and a group delay maximum variation of 2.5 ns. The positive slope of the group delay can be tuned in the range from 1.48 ns/GHz up to 2.03 ns/GHz. The concept of slope tunability is validated through post‐layout statistical analysis.

Summary: This article describes the design of integrated linear group delay filters for analog signal processing (ASP) applications and their implementation through constant‐resistance lattice and bridged‐T networks. Unlike previously published works, our design method uses a recursive procedure as the basis for the synthesis of a suitable transfer function. Thanks to this method, filters with a more linear group delay characteristic and flat magnitude response can be obtained. Two filters are designed in a 0.13‐μm BiCMOS technology to demonstrate the method: a balanced lattice with a negative slope and an unbalanced bridged‐T of positive slope.