Marc Seifried

We report recent advances in photonic–electronic integration developed in the European research project L3MATRIX. The aim of the project was to demonstrate the basic building blocks of a co-packaged optical system. Two-dimensional silicon photonics arrays with 64 modulators were fabricated. Novel modulation schemes based on slow light modulation were developed to assist in achieving an efficient performance of the module. Integration of DFB laser sources within each cell in the matrix was demonstrated as well using wafer bonding between the InP and SOI wafers. Improved semiconductor quantum dot MBE growth, characterization and gain stack designs were developed. Packaging of these 2D photonic arrays in a chiplet configuration was demonstrated using a vertical integration approach in which the optical interconnect matrix was flip-chip assembled on top of a CMOS mimic chip with 2D vertical fiber coupling. The optical chiplet was further assembled on a substrate to facilitate integration with the multi-chip module of the co-packaged system with a switch surrounded by several such optical chiplets. We summarize the features of the L3MATRIX co-package technology platform and its holistic toolbox of technologies to address the next generation of computing challenges.

CMOS-compatible III-V lasers integrated on silicon are a crucial step to reduce power consumption and cost for next-generation optical transceivers. Here, we demonstrate a concept to co-integrate III-V lasers into a CMOS Silicon Photonics platform, in which lasers, photonics, and electronic circuitry share the same back end of line. Based on a bonded III-V epitaxial layer stack, ultra-thin laser devices, optically pumped lasing and coupling to silicon are demonstrated. Furthermore, we present all building blocks for electrically pumped laser devices.

Optically transparent polymer waveguides are employed for interfacing silicon photonics devices to fibers. The highly confined optical mode in the nanophotonic silicon waveguide is transferred to a fiber-matched polymer waveguide through adiabatic optical coupling by tapering the silicon waveguide. The polymer waveguides are either processed onto the silicon photonics wafer or bonded to individual chips. Fibers are interfaced to the polymer waveguides through butt-coupling. We show polarization and wavelength-tolerant fiber-to-chip coupling loss of less than 3.5 dB across the O-band. The polymer waveguide-to-silicon-chip alignment tolerance is 2 μm for a loss increase of only 1 dB. Reflection losses are well below -45 dB and the scalability to large numbers of channels is demonstrated. These results open a path to broadband and polarization-tolerant optical packaging of silicon photonics devices for ultrahigh bandwidth applications employing wavelength division multiplexing across multiple channels as envisioned for future data-center interconnects.