MBMultan Biswas

Multan Biswas

*This is an algorithmically generated author record based on publicly available information.

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Multan Biswas has a total of 4 co-authors. Here are the top co-authors by number of shared publications:


Latest Publications

  • Open Access

    System Level Real-Time Simulation and Hardware-in-the-Loop Testing of MMCs

    by Michele Difronzo, Multan Biswas, Matthew Milton, Herbert L. Ginn, Andrea Benigni

    In this paper we present an approach for real-time simulation and Hardware-in-the-Loop (HIL) testing of Modular Multilevel Converters (MMCs) that rely on switching models while supporting system level analysis. Using the Latency Based Linear Multistep Compound (LB-LMC) approach, we achieved a 50 ns simulation time step for systems composed of several MMC converters and for converters of various complexity. To facilitate system level testing, we introduce the use of a serial communication-based (Aurora) interface for HIL testing of MMC converters and we analyzed the effect that communication latency has on the accuracy of the HIL test. The simulation and HIL results are validated against an MMC laboratory prototype.