Shun-Tsung Lo

Aluminum (Al) is the most critical material in the burgeoning field of superconducting quantum computing due to its self-limiting native oxide and reliable Josephson effect. However, material-induced decoherence remains a major bottleneck currently limits the scalability of quantum processors. As highlighted in seminal roadmaps, dielectric loss from amorphous interfaces and structural defects in standard evaporated Al films are the primary sources of noise. While current international efforts focus on engineering-level mitigation (e.g., circuit design), this review proposes a materials-level solution through the lens of research conducted in Taiwan. We will focus on the paradigm shift enabled by molecular beam epitaxy (MBE) growth of ultrahigh-quality Al nanofilms. Unlike traditional “dirty-limit” superconductors where transition temperature (Tc) increases are linked to disorder, researchers in Taiwan have demonstrated a doubling of Tc (reaching ≈ 2.4 K) in the ultraclean limit. We will discuss the underlying physics, such as surface phonon softening and quantum size effects, and why these clean-limit films are superior for practical applications. Notably, in situ Al2O3 passivation ensures long-term environmental stability, enabling MBE-grown-Al-based resonators to maintain internal quality factors exceeding 106 even after extended air exposure. Current literature frequently reviews atomic layer deposition (ALD) or disordered “granular aluminum” for high kinetic inductance. However, there is a significant gap in surveying epitaxial, wafer-scale Al for applied devices. Our review aims to provide a balanced global survey, showcasing how the synergy between MBE expertise and low-temperature physics in Taiwan provides a viable technological pathway to address the materials challenges of the quantum era.

Percolation transport dominates the charge conduction in amorphous and polycrystalline semiconductors. This study identifies a dimensional scaling effect unique to transistors using percolative semiconductors as channel materials, where the materials' percolation threshold (p_c) exhibits a strong correlation with the transistor threshold voltage (V_T). We demonstrate that both parameters are fundamentally governed by the semiconductor channel geometry. By reducing channel thickness, width, or length, p_c is modulated because the availability of conductive pathways is constrained by the channel dimensions, directly driving the observed V_T shifts. A quantitative link between p_c and V_T is established through the percolation potential landscape visualized by scanning tunneling microscopy. The result reveals that the energy landscape is determined by the Fermi level, a characteristic of percolative channels, where device turn-on occurs as the Fermi level exceeds the potential barriers to form conductive pathways. This mechanism is confirmed by temperature-dependent transport measurements, where the extracted activation energies exhibit a strong geometric dependence consistent with the p_c and V_T shifts. This scaling effect appears consistently in both n-type In₂O₃ and p-type SnO transistors, showing its universality across percolative semiconductors regardless of the carrier type. These findings demonstrate that transport in amorphous semiconductor devices is defined by percolation-governed transport rather than conventional electrostatics or quantum confinement, and establish geometry as a key design parameter for future amorphous electronics.

Aluminum (Al) has attracted considerable attention for uses in photonic, electronic, and quantum devices. Its grain architecture governs surface roughness, electron and light scattering, and quantum decoherence, all of which critically affect device performance. Enhancing crystalline domain size and refining granularity control remain an ongoing research focus for producing ultraclean nanofilms. This study investigates the crystallinity of epitaxial Al grown on miscut GaAs substrates and examines its influence on Al superconductivity. The introduction of a substrate miscut alters Al growth kinetics, enabling the formation of twinned grains, polycrystalline structures, and micrometer‐scale single crystal. Variations in grain architecture result in approximately 10%, 100%, and 1000% modulation of the superconducting critical temperature, current, and magnetic field, respectively, while maintaining constant channel geometries. Reducing macroscopic grain boundaries decreases the Al nanofilm resistivity but enhances strain‐induced crystallinity deterioration, driving a transition from type‐I to type‐II‐like superconducting behavior. We suggest that preparing Al nanofilms, which approach an ultraclean limit in terms of surface quality, crystallinity, and transport properties, requires careful control of substrate miscut as well as the grain architecture. These findings highlight a tunable approach to controlling Al granularity and superconductivity via miscut, lattice‐mismatched substrates.

The precise nature of Kondo spins has remained enigmatic when extended to multiple spin impurities or, more intriguingly, when the localized spin itself may already be the consequence of many-body interactions in a presumably delocalized open nanoconstriction, such as a quantum point contact (QPC). It is experimentally challenging to distinguish the Kondo state from other coexisting many-body spin states in such a strongly correlated system. Here we lithographically define an all-on-chip electronic resonator (ER) and a QPC in a high-mobility GaAs/AlGaAs heterostructure transistor. Local Kondo screening of the QPC spin and nonlocal spin singlet across the ER-QPC integration is controllable in response to ER occupancy parity. We also show that the 0.7 anomaly, another strongly correlated state in QPCs, not only has a different physical origin but furthermore counteracts the Kondo spin singlet. These results demonstrate a noninvasive quantum method for sensing spontaneous magnetic impurities within an open nanoconstriction.

In this study, HfO₂–ZrO₂ superlattice (SL) HfZrO₂ (HZO) 3.5-nm ultrathin poly-Si channel (UTPC) junctionless (JL) ferroelectric thin-film transistors (FeTFTs) with the two types of HfO₂/ZrO₂ nanolamination (NL) thicknesses (0.5 and 1.0 nm) and a 1.0-nm ZrO₂ seed layer were experimentally investigated and discussed their ferroelectricity and reliability for the first time. Compared with the conventional HZO UTPC JL FeTFTs, the SL HZO UTPC JL FeTFTs with a HfO₂ and ZrO₂ NL thickness of 1 nm achieved a relatively large pristine/residual pulsed memory window (MW) up to 1.09/1.06 V under a very low pulse height × pulse width down to 0.8 μVs and nearly zero MW degradation rate (ΔMW/MW_,pristine) down to 2.8% after the endurance test up to 10⁷ cycles. Furthermore, the SL HZO UTPC JL FeTFTs with an NL thickness of 1 nm exhibited a robust 10/298/423 K retention characteristic for 25 h with a sufficiently large pulsed MW of 1.30/1.38/0.65 V, and the synaptic behavior with a maximum channel conductance over 1400 nS. According to pulsed characteristic and reliability viewpoints, the HfO₂–ZrO₂ SL HZO UTPC JL FeTFTs are greatly promising candidates for 3-D NAND nonvolatile memories (NVMs) and neuromorphic systems.

2D semiconductor logic has advantages of reconfigurable multi‐state operation through extrinsic charge‐transfer doping mechanisms such as molecular adsorption and light illumination. However, their precise control remains challenging and they bring defects and blur the specified logic protocol for computation. Semiconducting 2D layered palladium diselenide (PdSe₂), a noble transition‐metal dichalcogenide with a puckered pentagonal atomic structure, has shown great potential for multi‐functional devices owing to its low crystal symmetry. Here, anisotropic charge transport in band‐like, variable‐range hopping, and quantum‐dot tunneling regimes are demonstrated in a multi‐terminal PdSe₂ transistor. The gate‐tunable oscillatory Hall charge movement due to zero‐magnetic‐field pseudo‐planar Hall effect provides a physical reference to encode the dynamical PdSe₂ anisotropic energy dispersions up to room temperature. Complementary XOR and XNOR logic relations between Hall voltage output and gate/drain voltage inputs are identified and they are reconfigurable with each other by changing the current injection direction. Controlling the layer number further reconfigures the planar‐Hall effect polarity and Hall logic. This work paves an all‐electric reconfigurable way to a planar‐Hall logic transistor, enabling the initialization, manipulation, and detection of anisotropic electronic states, and offers opportunities for next‐generation computing utilizing multiple energy bands of engineered anisotropies in puckered pentagonal 2D materials.

2023 International Conference on Solid State Devices and Materials ,Strong Gate Modulation Effect in Nanoscale TiN Channels

In nanostructure assemblies, the superposition of current paths forms microscopic electric circuits, and different circuit networks produce varying results, particularly when utilized as transistor channels for computing applications. However, the intricate nature of assembly networks and the winding paths of commensurate currents hinder standard circuit modeling. Inspired by the quantum collapse of superposition states for information decoding in quantum circuits, the implementation of analogous current path collapse to facilitate the detection of microscopic circuits by modifying their network topology is explored. Here, the superposition and collapse of current paths in gate‐all‐around polysilicon nanosheet arrays are demonstrated to enrich the computational resources within transistors by engineering the channel length and quantity. Switching the ferroelectric polarization of Hf_0.5Zr_0.5O₂ gate dielectric, which drives these transistors out‐of‐equilibrium, decodes the output polymorphism through circuit topological modifications. Furthermore, a protocol for the single‐electron readout of ferroelectric polarization is presented with tailoring the channel coherence. The introduction of lateral path superposition results into intriguing metal‐to‐insulator transitions due to transient behavior of ferroelectric switching. This ability to adjust the current networks within transistors and their interaction with ferroelectric polarization in polycrystalline nanostructures lays the groundwork for generating diverse current characteristics as potential physical databases for optimization‐based computing.

Integrating the Kondo correlation and spin-orbit interactions, each of which have individually offered unprecedented means to manipulate electron spins, in a controllable way can open up new possibilities for spintronics. We demonstrate electrical control of the Kondo correlation by coupling the bound spin to leads with tunable Rashba spin-orbit interactions, realized in semiconductor quantum point contacts. We observe a transition from single to double peak zero-bias anomalies in nonequilibrium transport—the manifestation of the Kondo effect—indicating a controlled Kondo spin reversal using only spin-orbit interactions. Universal scaling of the Kondo conductance is demonstrated, implying that the spin-orbit interactions could enhance the Kondo temperature. A theoretical model based on quantum master equations is also developed to calculate the nonequilibrium quantum transport.