LWLin Wang
Lin Wang
*This is an algorithmically generated author record based on publicly available information.
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Lin Wang has a total of 6 co-authors. Here are the top co-authors by number of shared publications:
- De-Feng Lin
Laboratory of Solid State Optoelectronics Information Technology, Institute of Semiconductors, CAS, Beijing 100083, China
1 shared publication - Lifang Jia
Laboratory of Solid State Optoelectronics Information Technology, Institute of Semiconductors, CAS, Beijing 100083, China
1 shared publication - Yun Zhang
Chinese Academy of Sciences, Institute of Semiconductors, Beijing, CHINA
1 shared publication - Zhe Cheng
Laboratory of Solid State Optoelectronics Information Technology, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China
1 shared publication - Zhe Liu
Laboratory of Solid State Optoelectronics Information Technology, Institute of Semiconductors, Chinese Academy of Sciences, Beijing, China
1 shared publication - Zhiguo Yu
Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China
1 shared publication
Latest Publications
- Open Access
- 30 July 2021
- Published by MDPI AG in Applied Sciences
- Vol. 11 (15) , 7057
Design and Switching Characteristics of Flip-Chip GaN Half-Bridge Modules Integrated with Drivers
Half-bridge modules with integrated GaN high electron mobility transistors (HEMTs) and driver dies were designed and fabricated in this research. Our design uses flip-chip technology for fabrication, instead of more generally applied wire bonding, to reduce parasitic inductance in both the driver-gate and drain-source loops. Modules were prepared using both methods and the double-pulse test was applied to evaluate and compare their switching characteristics. The gate voltage () waveform of the flip-chip module showed no overshoot during the turn-on period, and a small oscillation during the turn-off period. The probabilities of gate damage and false turn-on were greatly reduced. The inductance in the drain-source loop of the module was measured to be 3.4 nH. The rise and fall times of the drain voltage () were 12.9 and 5.8 ns, respectively, with an overshoot of only 4.8 V during the turn-off period under = 100 V. These results indicate that the use of flip-chip technology along with the integration of GaN HEMTs with driver dies can effectively reduce the parasitic inductance and improve the switching performance of GaN half-bridge modules compared to wire bonding.- 30 July 2021
- Published by MDPI AG in Applied Sciences
- Vol. 11 (15) , 7057
Open AccessDesign and Switching Characteristics of Flip-Chip GaN Half-Bridge Modules Integrated with Drivers
Half-bridge modules with integrated GaN high electron mobility transistors (HEMTs) and driver dies were designed and fabricated in this research. Our design uses flip-chip technology for fabrication, instead of more generally applied wire bonding, to reduce parasitic inductance in both the driver-gate and drain-source loops. Modules were prepared using both methods and the double-pulse test was applied to evaluate and compare their switching characteristics. The gate voltage () waveform of the flip-chip module showed no overshoot during the turn-on period, and a small oscillation during the turn-off period. The probabilities of gate damage and false turn-on were greatly reduced. The inductance in the drain-source loop of the module was measured to be 3.4 nH. The rise and fall times of the drain voltage () were 12.9 and 5.8 ns, respectively, with an overshoot of only 4.8 V during the turn-off period under = 100 V. These results indicate that the use of flip-chip technology along with the integration of GaN HEMTs with driver dies can effectively reduce the parasitic inductance and improve the switching performance of GaN half-bridge modules compared to wire bonding.