Saumil Bandyopadhyay

We demonstrate a nanophotonic integrator, fabricated in a silicon photonic process, that directly accumulates optical signals at 6.25 GSa/s in the optical domain with-out digitization and applies an inline nonlinearity for deep neural networks.

This paper analyzes the performance and energy efficiency of Netcast, a recently proposed optical neural-network architecture designed for edge computing. Netcast performs deep neural network inference by dividing the computational task into two steps, which are split between the (cloud) server and (edge) client: (1) the server employs a wavelength-multiplexed modulator array to encode the network's weights onto an optical signal in an analog time-wavelength basis, and (2) the client obtains the desired matrix-vector product through modulation and time-integrated detection. The simultaneous use of wavelength multiplexing, broadband modulation, and integration detection allows large neural networks to be run at the client by effectively pushing the energy and memory requirements back to the server. The performance and energy efficiency are fundamentally limited by crosstalk and detector noise, respectively. We derive analytic expressions for these limits and perform numerical simulations to verify these bounds.

Integrating nanophotonics with electronics promises revolutionary applications ranging from light detection and ranging (LiDAR) to holographic displays. Although semiconductor manufacturing of nanophotonics in Silicon Photonic foundries is maturing, realizing active nanophotonics in the ubiquitous bulk CMOS processes remains challenging. We introduce a fabless approach to embed active nanophotonics in bulk CMOS by co-designing the back-end-of-line metal layers for optical functionality. Without changing any of the design rules imposed by a 65 nm CMOS process, we realize plasmonic liquid crystal modulators that exhibit switching speeds 100 times faster than commercial technologies. Our approach, which embeds ’zero-change’ nanophotonics into the most ubiquitous platform for integrated electronics, democratizes fabrication of metal-optic nanophotonics, opens the path to mass production of active nanophotonic components, and overcomes major packaging challenges that have previously hindered the realization of complex metal-optic optoelectronic systems.

Multiport interferometers based on integrated beamsplitter meshes have recently captured interest as a platform for many emerging technologies. In this paper, we present a novel architecture for multiport interferometers based on the sine–cosine fractal decomposition of a unitary matrix. Our architecture is unique in that it is self‐similar, enabling the construction of modular multi‐chiplet devices. Due to this modularity, our design enjoys improved resilience to hardware imperfections as compared to conventional multiport interferometers. Additionally, the structure of our circuit enables systematic truncation, which is key in reducing the hardware footprint of the chip as well as compute time in training optical neural networks, while maintaining full connectivity. Numerical simulations show that truncation of these meshes gives robust performance even under large fabrication errors. This design is a step forward in the construction of large‐scale programmable photonics, removing a major hurdle in scaling up to practical machine learning and quantum computing applications.

We create nanophotonic devices using CMOS foundry processes where the top metal layers exhibit a plasmonic resonance. By integrating liquid crystals and applying a bias, we measure a 20 nm resonance shift at ~700 nm.

We report an end-to-end photonic deep neural network processor, fabricated in a commercial CMOS process, that integrates optical matrix algebra and nonlinear function units onto a single chip and implements all-optical DNN inference and training.

Component errors limit the scaling of programmable coherent photonic circuits. These errors arise because the standard tunable photonic coupler—the Mach-Zehnder interferometer (MZI)—cannot be perfectly programmed to the cross state. Here, we introduce two modified circuit architectures that overcome this limitation: (1) a 3-splitter MZI mesh for generic errors, and (2) a broadband MZI+Crossing design for correlated errors. Because these designs allow for perfect realization of the cross state, the matrix fidelity no longer degrades with increased mesh size, allowing scaling to arbitrarily large meshes. The proposed architectures support progressive self-configuration, are more compact than previous MZI-doubling schemes, and do not require additional phase shifters. This removes a key limitation to the development of very-large-scale programmable photonic circuits.

Advanced machine learning models are currently impossible to run on edge devices such as smart sensors and unmanned aerial vehicles owing to constraints on power, processing, and memory. We introduce an approach to machine learning inference based on delocalized analog processing across networks. In this approach, named Netcast, cloud-based “smart transceivers” stream weight data to edge devices, enabling ultraefficient photonic inference. We demonstrate image recognition at ultralow optical energy of 40 attojoules per multiply (100 watts) cloud computers.