Nasrin Rezaei-Hosseinabadi
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Nasrin Rezaei-Hosseinabadi has a total of 12 co-authors. Here are the top co-authors by number of shared publications:
- Sayed Ali Khajehoddin
Department of Electrical and Computer Engineering, University of Alberta, Edmonton, AB, Canada
5 shared publications - Kambiz Moez
University of Alberta
4 shared publications - Ahmadreza Tabesh
Department of Electrical and Computer Engineering, Isfahan University of Technology, Isfahan, Iran
3 shared publications - Abolghasem Zeidaabadi Nezhad
Department of Electrical and Computer Engineering, Isfahan University of Technology, Iran
2 shared publications - Afshin Amoorezaei
Department of Electrical and Computer Engineering, University of Alberta, Edmonton, AB, Canada
2 shared publications - Alireza Abasian
Department of Electrical and Computer Engineering, Isfahan University of Technology, Isfahan, Iran
2 shared publications
Latest Publications
- 29 December 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Power Electronics
- Vol. 41 (6) , 8869-8886
A Reconfigurable Resonant Modular Multilevel PMIC for Wide Input Voltage Range With Inherent Balancing and Soft Switching in 180 nm CMOS
Design of integrated power converters capable of operating with a wide input voltage range in standard CMOS technologies is challenging due to the low breakdown voltage of modern transistors. This article presents a fully integrated, fully soft-switched resonant modular multilevel converter (IRMMC), designed in standard 180 nm CMOS with nominal supply voltage of 1.8 V, that enables high-efficiency power conversion over a wide input voltage range of 2–5.5 V—well beyond the safe operating limits of scaled CMOS devices. The proposed architecture combines multilevel voltage division, resonant energy conversion, and modular reconfiguration to simultaneously support wide input adaptability, inherent flying-capacitor voltage balancing, and continuous output voltage regulation. A dynamically reconfigurable multilevel converter, utilizing an additional sub-module and control logic, enables seamless mode transitions and capacitor self-balancing without the need for complex sensing or control loops. An integrated LLC resonant tank, using a 0.8 nH in-package series inductor, along with an active rectifier, achieves output regulation from 0.4–1.2 V and ensures full zero-voltage switching (ZVS) for all power mosfets across the entire operating range. The prototype converter delivers a maximum output power of 2 W with a peak efficiency of 88%, demonstrating its suitability for compact, energy-efficient power delivery in integrated system-on-chip applications.
- 29 December 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Power Electronics
- Vol. 41 (6) , 8869-8886
A Reconfigurable Resonant Modular Multilevel PMIC for Wide Input Voltage Range With Inherent Balancing and Soft Switching in 180 nm CMOS
Design of integrated power converters capable of operating with a wide input voltage range in standard CMOS technologies is challenging due to the low breakdown voltage of modern transistors. This article presents a fully integrated, fully soft-switched resonant modular multilevel converter (IRMMC), designed in standard 180 nm CMOS with nominal supply voltage of 1.8 V, that enables high-efficiency power conversion over a wide input voltage range of 2–5.5 V—well beyond the safe operating limits of scaled CMOS devices. The proposed architecture combines multilevel voltage division, resonant energy conversion, and modular reconfiguration to simultaneously support wide input adaptability, inherent flying-capacitor voltage balancing, and continuous output voltage regulation. A dynamically reconfigurable multilevel converter, utilizing an additional sub-module and control logic, enables seamless mode transitions and capacitor self-balancing without the need for complex sensing or control loops. An integrated LLC resonant tank, using a 0.8 nH in-package series inductor, along with an active rectifier, achieves output regulation from 0.4–1.2 V and ensures full zero-voltage switching (ZVS) for all power mosfets across the entire operating range. The prototype converter delivers a maximum output power of 2 W with a peak efficiency of 88%, demonstrating its suitability for compact, energy-efficient power delivery in integrated system-on-chip applications.
- 25 November 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Industrial Electronics
- Vol. 73 (3) , 4214-4223
Design and Implementation of a Fully Soft-Switched Bidirectional Converter for EV Battery Equalizers
This article presents a novel fully soft-switched modular voltage equalizer that facilitates energy transfer between cells, packs, and modules. The equalizer, equipped with a multiwinding transformer, operates at high speed and efficiency. Soft switching is achieved for all energy transfer modes through a simple auxiliary circuit, ensuring that the switches do not generate voltage spikes and allowing for continuous current draw from the battery pack, thereby minimizing losses. A prototype of the equalizer was tested with 16 lithium-ion batteries divided into four modules, operating at a switching frequency of 100 kHz. The experimental results confirm the proper functionality of the proposed converter, demonstrating a circuit efficiency of 93.5% and balancer efficiency of 96%.
- 25 November 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Industrial Electronics
- Vol. 73 (3) , 4214-4223
Design and Implementation of a Fully Soft-Switched Bidirectional Converter for EV Battery Equalizers
This article presents a novel fully soft-switched modular voltage equalizer that facilitates energy transfer between cells, packs, and modules. The equalizer, equipped with a multiwinding transformer, operates at high speed and efficiency. Soft switching is achieved for all energy transfer modes through a simple auxiliary circuit, ensuring that the switches do not generate voltage spikes and allowing for continuous current draw from the battery pack, thereby minimizing losses. A prototype of the equalizer was tested with 16 lithium-ion batteries divided into four modules, operating at a switching frequency of 100 kHz. The experimental results confirm the proper functionality of the proposed converter, demonstrating a circuit efficiency of 93.5% and balancer efficiency of 96%.
- 28 February 2024
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Internet of Things Journal
- Vol. 11 (11) , 20433-20442
A Voltage-Feedback-Based Maximum Power Point Tracking Technique for Piezoelectric Energy Harvesting Interface Circuits
This article presents and demonstrates a voltage feedback-based technique to implement a power management integrated circuit (PMIC) for piezoelectric energy harvesting. It is analytically shown that the conducting time interval of a rectifying diode at the maximum power point is a fixed ratio of the vibration period. Thus, it can be used as a feedback to track the maximum power without measuring the output current/power. The technique can be tailored to various interface circuits, including full-bridge (FB), voltage doubler, and synchronized switch harvesting on an inductor. The micro-fabricated PMIC includes a FB rectifier, a digital maximum power point tracking (MPPT) controller, and a zero-current-switching (ZCS) integrated buck converter that uses two off-chip inductor and rectifying capacitor. The proposed technique enables the implementation of robust and power-efficient PMICs for MPPT of piezoelectric energy harvesters. To evaluate the performance of the technique, a PMIC using 130-nm CMOS technology is implemented and tested with a low power $( < 0.5$ mW) piezoelectric energy harvester. The results show that the PMIC effectively tracks the maximum power point at different vibration frequencies and amplitudes while the power consumption of its control circuitry is less than 0.001 mW.
- 28 February 2024
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Internet of Things Journal
- Vol. 11 (11) , 20433-20442
A Voltage-Feedback-Based Maximum Power Point Tracking Technique for Piezoelectric Energy Harvesting Interface Circuits
This article presents and demonstrates a voltage feedback-based technique to implement a power management integrated circuit (PMIC) for piezoelectric energy harvesting. It is analytically shown that the conducting time interval of a rectifying diode at the maximum power point is a fixed ratio of the vibration period. Thus, it can be used as a feedback to track the maximum power without measuring the output current/power. The technique can be tailored to various interface circuits, including full-bridge (FB), voltage doubler, and synchronized switch harvesting on an inductor. The micro-fabricated PMIC includes a FB rectifier, a digital maximum power point tracking (MPPT) controller, and a zero-current-switching (ZCS) integrated buck converter that uses two off-chip inductor and rectifying capacitor. The proposed technique enables the implementation of robust and power-efficient PMICs for MPPT of piezoelectric energy harvesters. To evaluate the performance of the technique, a PMIC using 130-nm CMOS technology is implemented and tested with a low power $( < 0.5$ mW) piezoelectric energy harvester. The results show that the PMIC effectively tracks the maximum power point at different vibration frequencies and amplitudes while the power consumption of its control circuitry is less than 0.001 mW.
- 16 June 2021
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Power Electronics
- Vol. 36 (12) , 13985-14001
A Low-Cost Cell-Level Differential Power Processing CMOS IC for Single Junction Photovoltaic Cells
This article presents a cell-level differential power processing IC to maximize the power yield under partial shading and mismatch condition in series-connected single junction photovoltaic (PV) cells. A 3-MHz bidirectional buck-boost converter is employed to realize voltage equalization technique forcing the PV cells to constantly operate close to their maximum power points. A novel and simple low-power low-area analog control circuit is proposed to maintain the high system efficiency at low and high levels of mismatch by obviating the need for power hungry blocks such as analog to digital converters, digital to analog converters, op-amps, saw-tooth generator, and regulators. The voltage of adjacent PV cells is used to drive the high-side switches through bootstrap supplies eliminating the need for voltage regulators. The performance of the proposed IC, fabricated in 130 nm CMOS process, is validated through simulation and experimental results. The converter is capable of processing mismatch currents up to 4 A while the control circuitry consumes less than 40 mW and a system efficiency above 95% is achieved.
- 16 June 2021
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Power Electronics
- Vol. 36 (12) , 13985-14001
A Low-Cost Cell-Level Differential Power Processing CMOS IC for Single Junction Photovoltaic Cells
This article presents a cell-level differential power processing IC to maximize the power yield under partial shading and mismatch condition in series-connected single junction photovoltaic (PV) cells. A 3-MHz bidirectional buck-boost converter is employed to realize voltage equalization technique forcing the PV cells to constantly operate close to their maximum power points. A novel and simple low-power low-area analog control circuit is proposed to maintain the high system efficiency at low and high levels of mismatch by obviating the need for power hungry blocks such as analog to digital converters, digital to analog converters, op-amps, saw-tooth generator, and regulators. The voltage of adjacent PV cells is used to drive the high-side switches through bootstrap supplies eliminating the need for voltage regulators. The performance of the proposed IC, fabricated in 130 nm CMOS process, is validated through simulation and experimental results. The converter is capable of processing mismatch currents up to 4 A while the control circuitry consumes less than 40 mW and a system efficiency above 95% is achieved.
- 29 January 2020
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Circuits and Systems I: Regular Papers
- Vol. 67 (6) , 1857-1866
A Wideband Frequency Divider With Programmable Odd/Even Division Factors and Quadrature/Symmetrical Outputs
An injection-locked frequency divider (ILFD) with odd/even division factor and wide locking range over process and temperature variations is presented. To enhance the locking range of the frequency divider and generate accurate quadrature with 50% duty cycle outputs, a comprehensive analysis of the frequency divider to find the optimal phase sequence for two, three and five division ratios is provided. Generating quadrature and symmetrical outputs with simultaneous realization of even and odd division ratios at low power is the main challenge that is addressed in this paper as the power consumption of existing quadrature circuits is an order of magnitude higher than that of the proposed ILFD. The ILFD is designed and simulated in a 65 nm CMOS technology and the analytical results verified by the circuit simulation results. Post layout simulation results show that the locking range of the divider without any tuning is from 5.4 GHz to 8.5 GHz, 1.1 GHz to 6.1 GHz and 0.1 GHz to 5.3 GHz in divide-by-five, three and two mode for 0 dBm injection signal level, respectively. The phase deviation of the quadrature outputs for dividers is less than 1.8° and the deviation of duty cycle from 50%, is less than 0.4%.
- 29 January 2020
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Circuits and Systems I: Regular Papers
- Vol. 67 (6) , 1857-1866
A Wideband Frequency Divider With Programmable Odd/Even Division Factors and Quadrature/Symmetrical Outputs
An injection-locked frequency divider (ILFD) with odd/even division factor and wide locking range over process and temperature variations is presented. To enhance the locking range of the frequency divider and generate accurate quadrature with 50% duty cycle outputs, a comprehensive analysis of the frequency divider to find the optimal phase sequence for two, three and five division ratios is provided. Generating quadrature and symmetrical outputs with simultaneous realization of even and odd division ratios at low power is the main challenge that is addressed in this paper as the power consumption of existing quadrature circuits is an order of magnitude higher than that of the proposed ILFD. The ILFD is designed and simulated in a 65 nm CMOS technology and the analytical results verified by the circuit simulation results. Post layout simulation results show that the locking range of the divider without any tuning is from 5.4 GHz to 8.5 GHz, 1.1 GHz to 6.1 GHz and 0.1 GHz to 5.3 GHz in divide-by-five, three and two mode for 0 dBm injection signal level, respectively. The phase deviation of the quadrature outputs for dividers is less than 1.8° and the deviation of duty cycle from 50%, is less than 0.4%.
- 1 August 2018
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Industrial Electronics
- Vol. 66 (6) , 4447-4456
Vacuum-Packaged Piezoelectric Energy Harvester for Powering Smart Grid Monitoring Devices
This paper presents an analytical method for the design and power optimization of vacuum packaged piezoelectric energy harvesters. It is shown that the maximum power point of a vacuum packaged energy harvester is different from the conventional one which occurs when the electrical damping ratio equals to its mechanical counterpart. Also, it is shown that the captured power by a vacuum packaged energy harvester is highly sensitive to the vibration frequency due to very low mechanical damping ratio, e.g. up to 50% power drops corresponding to 2% deviations in the frequency. The analysis and design is performed in the context of an ac-line magnetic field energy harvester in which the line frequency is also fixed and this energy harvester is useful for developing the self-powered wireless monitoring devices. Further, the vacuum packaged devices are inherently robust against dust storm and icing phenomenon which occur for overhead power lines. The proposed analytical method is established based on simplified assumptions and then an accurate method is developed for analysis of vacuum packaged devices. Obtained theoretical results are verified in the laboratory through a prototype of the vacuum packaged piezoelectric device which captures up to 90uW from a 10A line current.
- 1 August 2018
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Industrial Electronics
- Vol. 66 (6) , 4447-4456
Vacuum-Packaged Piezoelectric Energy Harvester for Powering Smart Grid Monitoring Devices
This paper presents an analytical method for the design and power optimization of vacuum packaged piezoelectric energy harvesters. It is shown that the maximum power point of a vacuum packaged energy harvester is different from the conventional one which occurs when the electrical damping ratio equals to its mechanical counterpart. Also, it is shown that the captured power by a vacuum packaged energy harvester is highly sensitive to the vibration frequency due to very low mechanical damping ratio, e.g. up to 50% power drops corresponding to 2% deviations in the frequency. The analysis and design is performed in the context of an ac-line magnetic field energy harvester in which the line frequency is also fixed and this energy harvester is useful for developing the self-powered wireless monitoring devices. Further, the vacuum packaged devices are inherently robust against dust storm and icing phenomenon which occur for overhead power lines. The proposed analytical method is established based on simplified assumptions and then an accurate method is developed for analysis of vacuum packaged devices. Obtained theoretical results are verified in the laboratory through a prototype of the vacuum packaged piezoelectric device which captures up to 90uW from a 10A line current.
- 20 November 2017
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Power Electronics
- Vol. 33 (12) , 10308-10316
Design Optimization of an Energy Harvesting Platform for Self-Powered Wireless Devices in Monitoring of AC Power Lines
This paper presents the design optimization of a magnetic field energy harvesting platform for self-powered ac power line monitoring devices in smart grid applications. The designed platform can be used with any type of vibration-to-electricity energy conversion schemes including piezoelectric, electromagnetic, and electrostatic energy harvesters. The platform includes a cantilever beam with a miniaturized permanent magnet (PM) at the tip that vibrates due to the interaction with the magnetic field of the ac line. The proposed method analytically determines the optimum geometric orientations of the platform as well as the optimum dimensions of PM to maximize the applied magnetic force to the beam. The validity of the design procedure and its assumptions are verified numerically and experimentally using a piezoelectric energy harvesting platform. The numerical and experimental test results confirm the calculated optimum orientation angles and PM dimensions that maximize the magnetic force. The analysis shows that for a PM with vibration direction in a plane normal to the power line, the maximum force can be achieved at the multiples of +45 degrees with reference to the vibration direction. The optimum orientation angle also depends on the angles between the magnetization vector and the direction of the vibration.
- 20 November 2017
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Power Electronics
- Vol. 33 (12) , 10308-10316
Design Optimization of an Energy Harvesting Platform for Self-Powered Wireless Devices in Monitoring of AC Power Lines
This paper presents the design optimization of a magnetic field energy harvesting platform for self-powered ac power line monitoring devices in smart grid applications. The designed platform can be used with any type of vibration-to-electricity energy conversion schemes including piezoelectric, electromagnetic, and electrostatic energy harvesters. The platform includes a cantilever beam with a miniaturized permanent magnet (PM) at the tip that vibrates due to the interaction with the magnetic field of the ac line. The proposed method analytically determines the optimum geometric orientations of the platform as well as the optimum dimensions of PM to maximize the applied magnetic force to the beam. The validity of the design procedure and its assumptions are verified numerically and experimentally using a piezoelectric energy harvesting platform. The numerical and experimental test results confirm the calculated optimum orientation angles and PM dimensions that maximize the magnetic force. The analysis shows that for a PM with vibration direction in a plane normal to the power line, the maximum force can be achieved at the multiples of +45 degrees with reference to the vibration direction. The optimum orientation angle also depends on the angles between the magnetization vector and the direction of the vibration.