Xintong Xie

In this work, a GaN/Si hybrid power switch is proposed to overcome the disadvantages of dynamic ON-resistance degradation and limited avalanche capability for pure-GaN switches. The proposed hybrid switch exhibits suppressed dynamic ON-resistance, increased power conversion efficiency and enhanced avalanche robustness when compared to the pure-GaN switch with exactly the same ratings. By employing an active gate control pattern between GaN and Si devices within the hybrid switch, the dynamic ON-resistance is significantly reduced by more than 20%. Consequently, it increases the efficiency by 2% in a 48-to-24 V DC-DC buck converter at the switching frequency of 500 kHz and an output power of 240 W. The single-event avalanche energy withstanding capability shows a two-order-of-magnitude improvement and no failure is observed after a 1000-cycle repetitive UIS (Unclamped Inductive Switching) test.

In this work, it is demonstrated that the buck converter using a GaN/Si hybrid switch can achieve an even higher power conversion efficiency than the one using a pure-GaN switch with the same ratings. By replacing one of the dual paralleled GaN HEMTs with a Si superjunction mosfet having the same voltage rating yet a slightly higher resistance, the total conduction loss, however, is significantly decreased. This is accomplished through suppressing the dynamic ON-state resistance peculiar to GaN HEMTs. Optimizing the gate timing between the GaN and the Si devices within the hybrid switch enables exceptional low-loss performance. Both device-level and system-level demonstrations are performed. The experimental results prove that the p-GaN gate HEMT/Si MOSFET hybrid switch increases the efficiency by 2% and 3%, respectively, when compared to its pure-GaN and pure-Si counterparts, at an output power of 240 W and a switching frequency of 500 kHz.

In this work, it is demonstrated for the first time that a negative gate voltage (V_GS) during off-state can enhance the single-event effect (SEE) hardness of the 100-V E-mode p-GaN HEMTs. When subjected to irradiation from Ta ions with linear energy transfer of 78.40 MeV/(mg/cm²), the single-event transient (SET) current peak during irradiation can be significantly decreased if a negative V_GS is applied, as opposed to using zero V_GS. Furthermore, a negative V_GS suppresses post-irradiation shifts in gate capacitance (C_G), threshold voltage (V_th) and off-state drain leakage current (I_DSS), indicating improved stability against SEE. Numerical simulations have been performed to offer a physical insight into the underlying mechanisms. It is found that a negative V_GS enables the simultaneous removal for radiation-induced holes and thus suppresses the SET current. The post-irradiation degradation of C_G, V_th and I_DSS are attributed to the radiation-induced acceptor-like traps at the Schottky junction, the AlGaN/GaN interface and the buffer layer, respectively.

In this paper, a novel AlGaN/GaN HEMT structure with a P-GaN buried layer in the buffer layer and a locally doped barrier layer under the gate (PN-HEMT) is proposed to enhance its resistance to single event transient (SET) effects while also overcoming the degradation of other characteristics. The device operation mechanism and characteristics are investigated by TCAD simulation. The results show that the peak electric field and impact ionization at the gate edges are reduced in the PN-HEMT due to the introduced P-GaN buried layer in the buffer layer. This leads to a decrease in the peak drain current (I_peak) induced by the SET effect and an improvement in the breakdown voltage (BV). Additionally, the locally doped barrier layer provides extra electrons to the channel, resulting in higher saturated drain current (I_D,sat) and maximum transconductance (g_max). The I_peak of the PN-HEMT (1.37 A/mm) is 71.8% lower than that of the conventional AlGaN/GaN HEMT (C-HEMT) (4.85 A/mm) at 0.6 pC/µm. Simultaneously, I_D,sat and BV are increased by 21.2% and 63.9%, respectively. Therefore, the PN-HEMT enhances the hardened SET effect of the device without sacrificing other key characteristics of the AlGaN/GaN HEMT.

A 600 V-rated insulated gate bipolar transistor (IGBT) with improved turn-on transient characteristics is proposed and investigated by simulation. The proposed IGBT features a built-in voltage-clamping structure. The floating ${p}$ -body adjacent to the trench gate is clamped at an appropriately high voltage before turn-on. This slows down the hole accumulation process in the floating p -body during turn-on transient, and thus the self-charging displacement current through the gate capacitance is reduced. The increasing rate for the gate voltage ( dV _GE / dt ) is then reduced. As a result, the proposed IGBT achieves a 25% decrease in collector current ( $I_C$ ) overshoot and 34% decrease in dI _C / dt , when compared with the conventional IGBT with the same turn-on loss ( E _ON ), at IC = 250 A/cm ² under hard-switching. Its fabrication process is compatible with conventional trench IGBT.