Xiang Yang
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Xiang Yang has a total of 7 co-authors. Here are the top co-authors by number of shared publications:
- Fengxuan Wang
Chinese Academy of Sciences, Institute of Semiconductors, Beijing, CHINA
3 shared publications - Fuhua Yang
Engineering Research Center for Semiconductor Integrated Technology, Institute of Semiconductors, Chinese Academy of Sciences, Beijing, China
3 shared publications - Jingmin Wu
Engineering Research Center for Semiconductor Integrated Technology, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China
3 shared publications - Zhi He
Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China
3 shared publications - Zhiyu Guo
Engineering Research Center for Semiconductor Integrated Technology, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China
3 shared publications - Zhongchao Fan
Engineering Research Center for Semiconductor Integrated Technology, Institute of Semiconductors, Chinese Academy of Sciences, Beijing, China
3 shared publications
Latest Publications
- 14 June 2022
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 69 (8) , 4617-4623
Study of Vertical Capacitance in an n-Type 4H-SiC Stepped Thick-Oxide Trench MOS Structure
In this work, characteristics of trench sidewall capacitance were investigated in a 4H-SiC stepped thick-oxide (STO) trench metal–oxide–semiconductor (MOS) structure. Multigroup SiC trench MOS capacitor test patterns with different structures and geometric parameters were designed and fabricated. From the capacitance–voltage measurements, the characteristics of the described SiC STO trench MOS were calculated and analyzed, including the thicknesses of the oxide at different locations in trench, the position of the oxide step at trench sidewall, and the flat-band voltages as well as the oxide charge densities of MOS from the upper part and lower part of oxide step at trench sidewall. Results showed that the flat-band voltages of MOS from the upper part (10.2 V) and lower part (12.5 V) of trench sidewall step had pronounced positive shifts over the ideal flat-band voltage (0.36 V), indicating a massive negative charges in the sidewall oxide film. Meanwhile, the net oxide charge density of MOS from the lower part of sidewall step ($- 0.92\times10$ 12 cm$^{-2}$ ) was smaller than that from the upper part ($- 2.41\times10$ 12 cm$^{-2}$ ), which was likely attributed to the massive shallow states in the oxide and to the poor quality of the thick-oxide film grown via chemical vapor deposition technology. The present works are providing a convenient technology to monitor the trench MOS structure by measuring the capacitance during SiC trench MOSFETs fabrication.- 14 June 2022
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 69 (8) , 4617-4623
Study of Vertical Capacitance in an n-Type 4H-SiC Stepped Thick-Oxide Trench MOS Structure
In this work, characteristics of trench sidewall capacitance were investigated in a 4H-SiC stepped thick-oxide (STO) trench metal–oxide–semiconductor (MOS) structure. Multigroup SiC trench MOS capacitor test patterns with different structures and geometric parameters were designed and fabricated. From the capacitance–voltage measurements, the characteristics of the described SiC STO trench MOS were calculated and analyzed, including the thicknesses of the oxide at different locations in trench, the position of the oxide step at trench sidewall, and the flat-band voltages as well as the oxide charge densities of MOS from the upper part and lower part of oxide step at trench sidewall. Results showed that the flat-band voltages of MOS from the upper part (10.2 V) and lower part (12.5 V) of trench sidewall step had pronounced positive shifts over the ideal flat-band voltage (0.36 V), indicating a massive negative charges in the sidewall oxide film. Meanwhile, the net oxide charge density of MOS from the lower part of sidewall step ($- 0.92\times10$ 12 cm$^{-2}$ ) was smaller than that from the upper part ($- 2.41\times10$ 12 cm$^{-2}$ ), which was likely attributed to the massive shallow states in the oxide and to the poor quality of the thick-oxide film grown via chemical vapor deposition technology. The present works are providing a convenient technology to monitor the trench MOS structure by measuring the capacitance during SiC trench MOSFETs fabrication.- Open Access
- 21 May 2022
- Published by MDPI AG in Micromachines
- Vol. 13 (5) , 804
Characteristics of Activation Rate and Damage of Ion-Implanted Phosphorous in 4H-SiC after Different Annealing by Optical Absorption
We investigated the ellipsometer-based characterization method being used to quickly evaluate the depth of the damage layer in ion-implanted 4H-SiC. This method had the advantages of low cost, convenience, and non-destructiveness. Optical absorption of n-type 4H-SiC substrate, P+ ion-implanted, laser-annealed, and conventional high-temperature annealed wafers were investigated at room temperature. Three peaks were observed in the absorption spectra collected for various samples. The degree of electrical activation after laser annealing or high-temperature annealing was evaluated qualitatively from the absorption peak intensity at 2.67 eV. The circular transmission line method (CTLM) results were consistent with the optical absorption results. However, it was found that the effective carrier concentration after laser annealing was significantly lower than that after high-temperature annealing.
- 21 May 2022
- Published by MDPI AG in Micromachines
- Vol. 13 (5) , 804
Open AccessCharacteristics of Activation Rate and Damage of Ion-Implanted Phosphorous in 4H-SiC after Different Annealing by Optical Absorption
We investigated the ellipsometer-based characterization method being used to quickly evaluate the depth of the damage layer in ion-implanted 4H-SiC. This method had the advantages of low cost, convenience, and non-destructiveness. Optical absorption of n-type 4H-SiC substrate, P+ ion-implanted, laser-annealed, and conventional high-temperature annealed wafers were investigated at room temperature. Three peaks were observed in the absorption spectra collected for various samples. The degree of electrical activation after laser annealing or high-temperature annealing was evaluated qualitatively from the absorption peak intensity at 2.67 eV. The circular transmission line method (CTLM) results were consistent with the optical absorption results. However, it was found that the effective carrier concentration after laser annealing was significantly lower than that after high-temperature annealing.
- Open Access
- 23 March 2022
- Published by MDPI AG in Applied Sciences
- Vol. 12 (7) , 3261
Low-Temperature Direct Bonding of SiC to Si via Plasma Activation
We investigated the low-temperature direct bonding of SiC/Si via O plasma activation. After optimization, a high bonding efficiency of over 90% was obtained. Surface activation was achieved via reactive ion etching (RIE) O plasma for 30 s without significant bombardment damage. A smooth and void-free interface was observed by transmission electron microscopy (TEM), while a significant amorphous oxide layer was also detected. By increasing the annealing temperature from 150 to 300 C, the amorphous layer decreased drastically from 48 nm to 11 nm. Based on systematic experiments and analysis, the mechanism of SiC/Si low-temperature plasma-activated bonding was discussed.- 23 March 2022
- Published by MDPI AG in Applied Sciences
- Vol. 12 (7) , 3261
Open AccessLow-Temperature Direct Bonding of SiC to Si via Plasma Activation
We investigated the low-temperature direct bonding of SiC/Si via O plasma activation. After optimization, a high bonding efficiency of over 90% was obtained. Surface activation was achieved via reactive ion etching (RIE) O plasma for 30 s without significant bombardment damage. A smooth and void-free interface was observed by transmission electron microscopy (TEM), while a significant amorphous oxide layer was also detected. By increasing the annealing temperature from 150 to 300 C, the amorphous layer decreased drastically from 48 nm to 11 nm. Based on systematic experiments and analysis, the mechanism of SiC/Si low-temperature plasma-activated bonding was discussed.