Ali Iftekhar Maswood
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Research Subjects
Ali Iftekhar Maswood has a total of 33 co-authors. Here are the top co-authors by number of shared publications:
- Mohd Tariq
Aligarh Muslim University
4 shared publications - Josep Pou
City University of Hong Kong
3 shared publications - Amit Kumar Gupta
Rolls-Royce Singapore Private Limited, Singapore
2 shared publications - Atif Iqbal
Department of Electrical Engineering, Qatar University, Doha, Qatar
2 shared publications - Changjiang Sun
Rolls-RoyceNTU Corporate Lab, Nanyang Technological University, Singapore
2 shared publications - Hossein Dehghani Tafti
Department of Electrical, Electronic and Computer Engineering, University of Western Australia, Crawley, WA, Australia
2 shared publications
Latest Publications
- 10 June 2022
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Power Electronics
- Vol. 37 (11) , 12955-12961
Multiagent Deep Reinforcement Learning-Aided Output Current Sharing Control for Input-Series Output-Parallel Dual Active Bridge Converter
This letter proposes a multiagent soft actor-critic (MASAC) enabled multiagent deep reinforcement learning (MADRL) algorithm for output current sharing of the input-series output-parallel dual active bridge converter. The modular converter is partitioned into different submodules, which are treated as DRL agents of Markov games. Furthermore, all agents are executed decentralized to provide online control decisions after collaborative training. The proposed MASAC algorithm verified in a 150 V/50 V hardware prototype shows optimal dynamic performance.
- 10 June 2022
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Power Electronics
- Vol. 37 (11) , 12955-12961
Multiagent Deep Reinforcement Learning-Aided Output Current Sharing Control for Input-Series Output-Parallel Dual Active Bridge Converter
This letter proposes a multiagent soft actor-critic (MASAC) enabled multiagent deep reinforcement learning (MADRL) algorithm for output current sharing of the input-series output-parallel dual active bridge converter. The modular converter is partitioned into different submodules, which are treated as DRL agents of Markov games. Furthermore, all agents are executed decentralized to provide online control decisions after collaborative training. The proposed MASAC algorithm verified in a 150 V/50 V hardware prototype shows optimal dynamic performance.
- Open Access
- 15 February 2022
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Access
- Vol. 10, 31868-31884
A Detailed Full-Order Discrete-Time Modeling and Stability Prediction of the Single-Phase Dual Active Bridge DC-DC Converter
The standard methodology to obtain the model of a power electronic converter is achieved by averaging the state-space dynamics of the converter’s state variables. But the average of the transformer current is null over a switching cycle in the resonant dc-dc converter. Therefore, the conventional method is not suitable for resonant converters, including the phase-shifted bidirectional dual active bridge (PSBDAB) converter. The two-time scale discrete-type models can resolve the problem associated with the standard state-space averaging methodology. The time-scale segregates the dynamics of the PSBDAB converter into fast and slow state variables, which can be modeled separately and eases the analysis of the PSBDAB converter. The effect of the core-loss of the inductor, dead-time of the semiconductor devices, output filter capacitor’s equivalent series resistance, semiconductor on-resistance, and the transformer copper loss components are included in the model to improve its steady-state and dynamics characteristics. Moreover, the stability analysis using a bifurcation diagram is carried out for the digitally controlled closed-loop of the system. Furthermore, the critical gain for the stable region with variations in the circuit parameters like load resistance, circuit equivalent inductance, and voltage demand is extensively studied. The modeling and stability analysis is validated in the simulation and experimental setup. The results verify that the proposed method accurately predicts the stable region with variations in the system circuit parameters. Thus this study provides a guide to select and tune the controller parameter to ensure the converter operates within the boundaries of the stable region.
- 15 February 2022
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Access
- Vol. 10, 31868-31884
Open AccessA Detailed Full-Order Discrete-Time Modeling and Stability Prediction of the Single-Phase Dual Active Bridge DC-DC Converter
The standard methodology to obtain the model of a power electronic converter is achieved by averaging the state-space dynamics of the converter’s state variables. But the average of the transformer current is null over a switching cycle in the resonant dc-dc converter. Therefore, the conventional method is not suitable for resonant converters, including the phase-shifted bidirectional dual active bridge (PSBDAB) converter. The two-time scale discrete-type models can resolve the problem associated with the standard state-space averaging methodology. The time-scale segregates the dynamics of the PSBDAB converter into fast and slow state variables, which can be modeled separately and eases the analysis of the PSBDAB converter. The effect of the core-loss of the inductor, dead-time of the semiconductor devices, output filter capacitor’s equivalent series resistance, semiconductor on-resistance, and the transformer copper loss components are included in the model to improve its steady-state and dynamics characteristics. Moreover, the stability analysis using a bifurcation diagram is carried out for the digitally controlled closed-loop of the system. Furthermore, the critical gain for the stable region with variations in the circuit parameters like load resistance, circuit equivalent inductance, and voltage demand is extensively studied. The modeling and stability analysis is validated in the simulation and experimental setup. The results verify that the proposed method accurately predicts the stable region with variations in the system circuit parameters. Thus this study provides a guide to select and tune the controller parameter to ensure the converter operates within the boundaries of the stable region.
- 24 December 2021
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Emerging and Selected Topics in Power Electronics
- Vol. 11 (1) , 301-311
Active Disturbance Rejection Control Using Artificial Neural Network for Dual-Active-Bridge-Based Energy Storage System
The dual active bridge (DAB) converter has become a popular isolated solution to integrate energy storage systems (ESSs) and dc microgrids (MGs). However, constant power loads (CPLs) and pulsed power loads (PPLs) may reduce system damping and cause voltage oscillations in DAB converter-based ESSs (DAB-ESSs). An artificial neural network-based active disturbance rejection control (ANN-ADRC) is proposed to regulate constant output voltage quickly and accurately under different operating conditions. Firstly, the ADRC controller is designed based on the small-signal modeling of the DAB-ESSs. Feedforward compensation and uncertainty estimations of the extended state observer (ESO) help to improve the dynamic performance and to reduce the number of current sensors. Then, after satisfying the conditions of stability analysis, the parameters of the ADRC controller are selected automatically via ANN. The ANN is trained with two inputs (ADRC controller parameters) and two outputs (performance indicators of the ADRC controller). The well-trained ANN can be used as a surrogate model to obtain the optimal solution of the objective function easily and quickly. The proposed ANN-ADRC algorithm with selected parameters is implemented and validated on the hardware experimental setup. The experimental results illustrate that the proposed controller can achieve fast dynamic performance under various operating conditions.
- 24 December 2021
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Emerging and Selected Topics in Power Electronics
- Vol. 11 (1) , 301-311
Active Disturbance Rejection Control Using Artificial Neural Network for Dual-Active-Bridge-Based Energy Storage System
The dual active bridge (DAB) converter has become a popular isolated solution to integrate energy storage systems (ESSs) and dc microgrids (MGs). However, constant power loads (CPLs) and pulsed power loads (PPLs) may reduce system damping and cause voltage oscillations in DAB converter-based ESSs (DAB-ESSs). An artificial neural network-based active disturbance rejection control (ANN-ADRC) is proposed to regulate constant output voltage quickly and accurately under different operating conditions. Firstly, the ADRC controller is designed based on the small-signal modeling of the DAB-ESSs. Feedforward compensation and uncertainty estimations of the extended state observer (ESO) help to improve the dynamic performance and to reduce the number of current sensors. Then, after satisfying the conditions of stability analysis, the parameters of the ADRC controller are selected automatically via ANN. The ANN is trained with two inputs (ADRC controller parameters) and two outputs (performance indicators of the ADRC controller). The well-trained ANN can be used as a surrogate model to obtain the optimal solution of the objective function easily and quickly. The proposed ANN-ADRC algorithm with selected parameters is implemented and validated on the hardware experimental setup. The experimental results illustrate that the proposed controller can achieve fast dynamic performance under various operating conditions.
- 16 December 2019
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Industry Applications
- Vol. 56 (2) , 1907-1917
Design and Implementation of Cascaded Multilevel qZSI Powered Single-Phase Induction Motor for Isolated Grid Water Pump Application
This paper presents the design and implementation of solar powered V/f controlled single phase capacitor start induction motor. Multi Level Quasi Impedance Source Inverter (MLqZSI) controls the power flowing from PV array to single - phase induction motor. In solar powered drive systems, main concern is stable intended operation of drive when subjected to variations in power generation of PV array. For same environmental conditions, PV power extraction is different at different torques for constant speed application. Due to this, extraction of maximum power with MPPT algorithm is not achieved with only motor load. To address this concern, concept of battery storage system is introduced in the system which helps in achieving maximum power when PV power generation capability exceeds rated motor input power. In addition to this, battery storage system can supply power to the load when PV power generation is less than the rated motor input power. Conclusively, design of control algorithm must address issues of MPPT algorithm, control of battery storage system and stable operation of V/f - controlled induction motor drive operation. MATLAB®/ Simulink model of the proposed system with 4kW PV array rating is developed. Proposed Control Algorithm achieves satisfactory operation of single - phase motor drive in all the three operation modes (depending upon PV power generation). Variation of solar irradiation and temperature are simultaneously considered for introducing perturbation in the PV power generation. Hardware results for this system are also presented which validates the effectiveness of the control algorithm for the proposed system.
- 16 December 2019
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Industry Applications
- Vol. 56 (2) , 1907-1917
Design and Implementation of Cascaded Multilevel qZSI Powered Single-Phase Induction Motor for Isolated Grid Water Pump Application
This paper presents the design and implementation of solar powered V/f controlled single phase capacitor start induction motor. Multi Level Quasi Impedance Source Inverter (MLqZSI) controls the power flowing from PV array to single - phase induction motor. In solar powered drive systems, main concern is stable intended operation of drive when subjected to variations in power generation of PV array. For same environmental conditions, PV power extraction is different at different torques for constant speed application. Due to this, extraction of maximum power with MPPT algorithm is not achieved with only motor load. To address this concern, concept of battery storage system is introduced in the system which helps in achieving maximum power when PV power generation capability exceeds rated motor input power. In addition to this, battery storage system can supply power to the load when PV power generation is less than the rated motor input power. Conclusively, design of control algorithm must address issues of MPPT algorithm, control of battery storage system and stable operation of V/f - controlled induction motor drive operation. MATLAB®/ Simulink model of the proposed system with 4kW PV array rating is developed. Proposed Control Algorithm achieves satisfactory operation of single - phase motor drive in all the three operation modes (depending upon PV power generation). Variation of solar irradiation and temperature are simultaneously considered for introducing perturbation in the PV power generation. Hardware results for this system are also presented which validates the effectiveness of the control algorithm for the proposed system.
- 17 September 2018
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Industry Applications
- Vol. 55 (1) , 721-731
Parallel Operation of Unity Power Factor Rectifier for PMSG Wind Turbine System
Offshore wind power has inspired the fields of high voltage direct current (HVDC) for advantages of high power transmission in long distance. Hefty wind generators are making advanced multilevel rectifier and parallel operation of rectifiers popular choice of research with the aim to accommodate higher power. Issues of reliability and complexity of control are associated with active power electronic devices at such high power. This paper focuses on the novelty of operation of parallel three-phase diode rectifiers each with auxiliary bidirectional switching blocks (BSB) to improve its performance. For the system maximum percentage power is commuted through the three phase diode rectifier and paralleling further lessens the current stress on the semiconductor switches present in the BSBs. Competence of continuous operation at times of any specific branch failure provides the proposed system with higher modularity and reliability. The paralleled topology is controlled to obtain unity power factor at generator output with low generator output-current harmonics using hysteresis current control. The dc-link voltage is controlled at a reference value, for various dynamic variations along with balanced capacitor voltages. The permanence of proposed system is simulated for scenarios associated with variation of wind speed and load demands, while various operation modes are tested on a 2.5 kW experimental setup.
- 17 September 2018
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Industry Applications
- Vol. 55 (1) , 721-731
Parallel Operation of Unity Power Factor Rectifier for PMSG Wind Turbine System
Offshore wind power has inspired the fields of high voltage direct current (HVDC) for advantages of high power transmission in long distance. Hefty wind generators are making advanced multilevel rectifier and parallel operation of rectifiers popular choice of research with the aim to accommodate higher power. Issues of reliability and complexity of control are associated with active power electronic devices at such high power. This paper focuses on the novelty of operation of parallel three-phase diode rectifiers each with auxiliary bidirectional switching blocks (BSB) to improve its performance. For the system maximum percentage power is commuted through the three phase diode rectifier and paralleling further lessens the current stress on the semiconductor switches present in the BSBs. Competence of continuous operation at times of any specific branch failure provides the proposed system with higher modularity and reliability. The paralleled topology is controlled to obtain unity power factor at generator output with low generator output-current harmonics using hysteresis current control. The dc-link voltage is controlled at a reference value, for various dynamic variations along with balanced capacitor voltages. The permanence of proposed system is simulated for scenarios associated with variation of wind speed and load demands, while various operation modes are tested on a 2.5 kW experimental setup.
- Open Access
- 5 October 2017
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Industry Applications
- Vol. 54 (1) , 745-754
Design and Implementation of Fourth Arm for Elimination of Bearing Current in NPC-MLI-Fed Induction Motor Drive
The exploration result of an increase in power electronics converter based variable speed drives for industrial applications reveals the impact of inverter induced bearing current on the prevailing electric machine failure. The bearing current associated with drive systems are concerned about operating frequencies of the solid-state semiconductor switches which may cause the electrostatic charge between stator and rotor which eventually causes damage to windings and bearings. The various techniques comprised in literature to suppress bearing currents are filter design, switching redundancy, common mode circuitry, isolated grounding scheme and grounding the motor shaft. From the literature, the PWM inverter injected common-mode voltage (CMV) is the main source of common-mode current which causes the bearing current. Hence the elimination of CMV paves the way for eliminating bearing current of the machine. This paper presents an innovative solution to suppress bearing currents by aiding a fourth arm circuitry (FAC) to acquire near to zero potential (zero CMV) at machine neutral point. All the proposed circuitry and algorithm are simulated using MATLAB/Simulink and validation is done through a 2.5 kW NPC-MLI laboratory prototype using a Xilinx family SPARTAN-III-3A XC3SD1800A-FG676 DSP-FPGA board.
- 5 October 2017
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Industry Applications
- Vol. 54 (1) , 745-754
Open AccessDesign and Implementation of Fourth Arm for Elimination of Bearing Current in NPC-MLI-Fed Induction Motor Drive
The exploration result of an increase in power electronics converter based variable speed drives for industrial applications reveals the impact of inverter induced bearing current on the prevailing electric machine failure. The bearing current associated with drive systems are concerned about operating frequencies of the solid-state semiconductor switches which may cause the electrostatic charge between stator and rotor which eventually causes damage to windings and bearings. The various techniques comprised in literature to suppress bearing currents are filter design, switching redundancy, common mode circuitry, isolated grounding scheme and grounding the motor shaft. From the literature, the PWM inverter injected common-mode voltage (CMV) is the main source of common-mode current which causes the bearing current. Hence the elimination of CMV paves the way for eliminating bearing current of the machine. This paper presents an innovative solution to suppress bearing currents by aiding a fourth arm circuitry (FAC) to acquire near to zero potential (zero CMV) at machine neutral point. All the proposed circuitry and algorithm are simulated using MATLAB/Simulink and validation is done through a 2.5 kW NPC-MLI laboratory prototype using a Xilinx family SPARTAN-III-3A XC3SD1800A-FG676 DSP-FPGA board.
- 11 July 2017
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Power Electronics
- Vol. 33 (5) , 4088-4101
A General Constant Power Generation Algorithm for Photovoltaic Systems
Photovoltaic power plants (PVPPs) typically operate by tracking the maximum power point in order to maximize conversion efficiency. However, with the continuous increase of installed grid-connected PVPPs, power system operators have been experiencing new challenges, like overloading, overvoltages and operation during grid voltage disturbances. Consequently, constant power generation (CPG) is imposed by grid codes. An algorithm for the calculation of the photovoltaic panel voltage reference, which generates a constant power from the PVPP, is introduced in this paper. The key novelty of the proposed algorithm is its applicability for both single- and two-stage PVPPs and flexibility to move the operation point to the right- or left-side of the maximum power point. Furthermore, the execution frequency of the algorithm and voltage increments between consecutive operating points are modified based on a hysteresis band controller in order to obtain fast dynamic response under transients and low power oscillation during steady-state operation. The performance of the proposed algorithm for both single- and two-stage PVPPs is examined on a 50-kVA simulation setup of these topologies. Moreover, experimental results on a 1-kVA PV system validate the effectiveness of the proposed algorithm under various operating conditions, demonstrating functionalities of the proposed CPG algorithm.
- 11 July 2017
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Power Electronics
- Vol. 33 (5) , 4088-4101
A General Constant Power Generation Algorithm for Photovoltaic Systems
Photovoltaic power plants (PVPPs) typically operate by tracking the maximum power point in order to maximize conversion efficiency. However, with the continuous increase of installed grid-connected PVPPs, power system operators have been experiencing new challenges, like overloading, overvoltages and operation during grid voltage disturbances. Consequently, constant power generation (CPG) is imposed by grid codes. An algorithm for the calculation of the photovoltaic panel voltage reference, which generates a constant power from the PVPP, is introduced in this paper. The key novelty of the proposed algorithm is its applicability for both single- and two-stage PVPPs and flexibility to move the operation point to the right- or left-side of the maximum power point. Furthermore, the execution frequency of the algorithm and voltage increments between consecutive operating points are modified based on a hysteresis band controller in order to obtain fast dynamic response under transients and low power oscillation during steady-state operation. The performance of the proposed algorithm for both single- and two-stage PVPPs is examined on a 50-kVA simulation setup of these topologies. Moreover, experimental results on a 1-kVA PV system validate the effectiveness of the proposed algorithm under various operating conditions, demonstrating functionalities of the proposed CPG algorithm.
- Open Access
- 1 September 2013
- Published by Institution of Engineering and Technology (IET) in IET Power Electronics
- Vol. 6 (8) , 1530-1543
Comparative study of multilevel inverters under unbalanced voltage in a single DC link
This study explores the feasibility of an AC/DC/AC drive with near unity power factor front‐end rectifier and five‐level rear‐end multilevel inverter topology with a focus on achieving lower voltage total harmonic distortion and higher energy efficiency. The unity PF front‐end rectifier in this AC/DC/AC drive may cause unbalanced voltage in the DC bus capacitors leading to high voltage distortion on the output AC voltage of a rear‐end multilevel inverter. Based on the analysis, modelling and experimental results, rear‐end multilevel flying‐capacitor inverter with unity PF front‐end rectifier in an AC/DC/AC power drive is proposed which is able to provide better DC voltage balancing when compared to diode‐clamped topology. Having no diode components being used in this multilevel inverter, the flying‐capacitor topology produces lesser commutation losses. Furthermore, rear‐end multilevel flying‐capacitor topology offers better efficiency and good quality output voltage without any bulky and expensive LC filter and even without any additional DC voltage balancing circuitry. The analytical performance of the drive is verified on a 1.3 kW laboratory prototype.
- 1 September 2013
- Published by Institution of Engineering and Technology (IET) in IET Power Electronics
- Vol. 6 (8) , 1530-1543
Open AccessComparative study of multilevel inverters under unbalanced voltage in a single DC link
This study explores the feasibility of an AC/DC/AC drive with near unity power factor front‐end rectifier and five‐level rear‐end multilevel inverter topology with a focus on achieving lower voltage total harmonic distortion and higher energy efficiency. The unity PF front‐end rectifier in this AC/DC/AC drive may cause unbalanced voltage in the DC bus capacitors leading to high voltage distortion on the output AC voltage of a rear‐end multilevel inverter. Based on the analysis, modelling and experimental results, rear‐end multilevel flying‐capacitor inverter with unity PF front‐end rectifier in an AC/DC/AC power drive is proposed which is able to provide better DC voltage balancing when compared to diode‐clamped topology. Having no diode components being used in this multilevel inverter, the flying‐capacitor topology produces lesser commutation losses. Furthermore, rear‐end multilevel flying‐capacitor topology offers better efficiency and good quality output voltage without any bulky and expensive LC filter and even without any additional DC voltage balancing circuitry. The analytical performance of the drive is verified on a 1.3 kW laboratory prototype.
- 25 April 2012
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Systems Journal
- Vol. 7 (4) , 732-741
Desalination With a Solar-Assisted Heat Pump: An Economic Optimization
The solar-assisted heat pump (SAHP) desalination, based on the Rankin cycle, operates in low temperature and utilizes both solar and ambient energy. An experimental SAHP desalination system has been constructed at the National University of Singapore, Singapore. The system consisted of two main sections: an SAHP and a water distillation section. Experiments were carried out under the different meteorological condition of Singapore and results showed that the system had a performance ratio close to 1.3. The heat pump has a coefficient of performance of about 8, with solar collector efficiencies of 80% and 60% for evaporator and liquid collectors, respectively. Economic analysis showed that at a production rate of 900 L/day and an evaporator collector area of around 70 m2 will have a payback period of about 3.5 years.
- 25 April 2012
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Systems Journal
- Vol. 7 (4) , 732-741
Desalination With a Solar-Assisted Heat Pump: An Economic Optimization
The solar-assisted heat pump (SAHP) desalination, based on the Rankin cycle, operates in low temperature and utilizes both solar and ambient energy. An experimental SAHP desalination system has been constructed at the National University of Singapore, Singapore. The system consisted of two main sections: an SAHP and a water distillation section. Experiments were carried out under the different meteorological condition of Singapore and results showed that the system had a performance ratio close to 1.3. The heat pump has a coefficient of performance of about 8, with solar collector efficiencies of 80% and 60% for evaporator and liquid collectors, respectively. Economic analysis showed that at a production rate of 900 L/day and an evaporator collector area of around 70 m2 will have a payback period of about 3.5 years.