Kyeongrae Cho

We propose an electric field-assisted neural-network modeling framework for predicting threshold voltage in advanced recessed 3-D nand cells under sparse-data conditions. Because the evaluation of advanced 3-D nand structure is costly, available datasets remain inherently limited, reinforcing the sparse-data challenge. Our suggested electric field-assisted neural network (EFA-NN) incorporates the step-wise electric field evolution during programming and retention operations and transfers knowledge from a dense conventional cell dataset to improve prediction robustness in a sparse advanced recessed-cell dataset. A convolutional neural network (CNN)–gated recurrent unit (GRU)–transformer encoder–decoder extracts key features (KFs) from the electric field and predicts the 17-point threshold voltage during incremental step pulse programming (ISPP) and retention operations from these KFs and structural parameters. Compared with a conventional multilayer perceptron (MLP) baseline, the proposed model achieves up to approximately 35% higher accuracy in the most sparse-data regime and maintains a clear accuracy gain when trained with 100 advanced samples via transfer learning from conventional cells. Furthermore, coupling the surrogate with a genetic-algorithm-based multiobjective optimizer enables the identification of recessed 3-D nand cells that improve retention characteristics (ETs) by approximately 34% without program window degradation, over an optimized conventional cell structure, thereby overcoming the conventional program–retention trade-off. Finally, these results can be used for Pareto-optimal design of advanced 3-D nand cells under realistic sparse-data conditions.

In modern advanced device development, process-split experiments are crucial for finding the optimum device process and structure. However, each split involves substantial cost and time, making it difficult to conduct extensive experiments and collect enough data. In this study, data scarcity in next-generation 3-D nand cell design was mitigated by utilizing generative artificial intelligence (AI) trained with limited, yet well-calibrated technology computer-aided design (TCAD) data. The proposed method enabled effective machine learning (ML)-based nand modeling by generating synthetic big data through a denoising diffusion probabilistic model (DDPM) and applying transfer learning using both limited data and synthetic data. A DDPM was trained with limited TCAD data to model the joint distribution of the structure parameters and four key electrical characteristics of the nand cell: threshold voltages of initial and programming states (V ${}_{\text {t, init}}$ , V_t), subthreshold swing (), and on-current (I_on). Synthetic data points were sampled from the learned distribution, and a multilayer perceptron (MLP) model was pretrained using these data to predict electrical characteristics from the structure parameters. Transfer learning was applied to effectively fine-tune the pretrained model. The fully trained model outperformed those trained with limited raw data alone, reducing test losses of the four electrical characteristics by at least 10% and up to 84%. In the data-scarce development environment of next-generation nand devices, the proposed approach generates high-fidelity models from limited data, enabling effective design and optimization.

Electrical characteristics of scaled 3-D nand cells for next-generation node development were predicted using transfer learning with limited data. The nand cell structure parameters were considered as the inputs, and outputs included key electrical characteristics, such as cell ${V}_{t}$ , the difference in ${V}_{t}$ between the initial and programming states ( $\Delta {V}_{t}$ ), subthreshold swing (SS), and on-current ( ${I}_{\text {ON}}$ ). A multilayer perceptron (MLP) model comprising four hidden layers and focusing on large nand cells (25 nm gate length) with 2000 data points served as a pre-trained model. The transfer model leveraged pre-trained knowledge to predict the electrical characteristics of smaller cells (19 nm gate length) with 500 data points without weight and bias training. Evaluation of test data exhibited remarkable accuracy with both the mean and standard deviation below 3%, proving the model’s effectiveness despite limited data. In addition, a comprehensive evaluation was conducted by comparing the performance of the model with variations in the dataset size and the presence of transfer learning, highlighting the effectiveness and advantages of transfer learning. Transfer learning could provide detailed structure information of the next node for engineers and expedite device development, resulting in significant time and cost savings.

We propose a novel approach that combines machine learning (ML) and Pareto optimization to simultaneously enhance the program efficiency and disturbance of 3D-NAND flash memory. The relationship between program pulse (PP) shapes and threshold voltage shifts has never been investigated owing to the presence of numerous PP shapes. The complex relationship is modeled rapidly and quantitatively by leveraging ML. A multiobjective optimization problem is designed to consider the trade-off in program efficiency and disturbance. Pareto optimization facilitates determining PP shapes that achieve optimal solutions between maximizing program efficiency and minimizing program disturbance. The Pareto front provides practical and intuitive candidates for determining optimal PP shapes. Experimental results confirm that the program efficiency and disturbance can be enhanced by 14%–22% and 5%–40%, respectively. The ML-based Pareto optimization has the potential to vary the pulse conditions for desired operations in 3D-NAND flash, which is the biggest nonvolatile memory market in the semiconductor industry.

Herein, novel neural network (NN) methods that improve prediction accuracy and reduce output variance of the optimized input in the gradient method for cross‐sectional data are proposed, and the variability evaluation approach of optimized inputs in the semiconductor process is suggested. Specifically, electrical parameter measurements (EPMs) and power‐delay product of industrial high‐k metal gate DRAM peripheral 29‐stage ring oscillator circuits, including NMOS, PMOS, and interconnects, are focused on. The proposed methods find an optimized input to achieve a lower NN output variance in the gradient descent than one multilayer perceptron (MLP) and mean ensemble of MLPs even when considering the variabilities of the devices and interconnects. The local optima problem of one MLP is resolved by utilizing multiple MLPs trained with different train/validation data, their trimmed mean, and an additional learnable layer. Moreover, adding the learnable layer secures versatility for various parametric datasets. The methods improve the prediction accuracy (R²) by 5.6–15.6% in sparse data space compared to one MLP and the mean ensemble, decrease the NN output variance of the optimized input by 73.0–81.6% compared to one MLP and the mean ensemble, and are successfully verified by implementing it on EPMs of 3977 test patterns of 314 wafers and 16 lots.

We used a novel neural network (NN) approach to predict the short-term threshold voltage ( $\textit{V}_{\textit{t}}\text{)}$ of 3-D NAND flash memory. Then, we optimized the cell structure parameters to improve retention with minimal $\textit{V}_{\textit{t}}$ loss. In other words, we proposed a new NN architecture that combines a multilayer perceptron (MLP) and long short-term memory (LSTM) NNs to predict time-variant characteristics and optimize them as time-invariant parameters. We effectively prevented local minimums by modifying the optimization process using gradient descent to find multiple solutions and estimate the optimal point. The NN discovered an optimized structure that reduces $\textit{V}_{\textit{t}}$ loss by 32.37% compared to the minimum value of random big data. The optimized structure improved retention by having a thicker tunneling oxide (TOX) and longer spacer length than the technology computer-aided design (TCAD) calibration, resulting in a 4.27% improvement in trapped electron variation. Additionally, sensitivity analysis through iterative optimization experiments identified the tunneling/blocking oxide and channel thickness as key parameters influencing $\textit{V}_{\textit{t}}$ loss. Unlike traditional engineering methods that optimize individual parameters separately, NN optimization considers the correlations among all input parameters simultaneously. Therefore, the novel NN optimization can reduce the need for manual optimization and accelerate the design process by allowing designers to explore a wide range of possibilities quickly. This provides potential advanced optimization strategies that offer new alternatives for improving retention characteristics.

The enhancement of program efficiency is essential for fast NAND cell operation. However, it is difficult to simultaneously consider many factors, such as structural parameters and trap characteristics, having complex relationships. To overcome these problems, we proposed a neural network (NN)-applied optimization method. First, an optimal network structure was selected by comparing the network performance and learning time. The selected network accurately predicted the threshold voltages of the 21 states of a single NAND cell within a second. Next, an optimization method to improve program efficiency is suggested. The improved NAND cell structure is obtained using a trained NN and numerical method. Here, the optimization required only a few minutes for one optimization process and could consider all parameters simultaneously. Finally, the optimized NAND cell was evaluated using a technology computer-aided design (TCAD) simulation, and its program efficiency was verified. This study shows a specific example of machine learning applied to the semiconductor area, especially in NAND flash memory.

A machine-learning (ML) technique was used to optimize the energetic-trap distributions of nano-scaled charge trap nitride (CTN) in 3D NAND Flash to widen the threshold voltage (V_th) window, which is crucial for NAND operation. The energetic-trap distribution is a critical material property of the CTN that affects the V_th window between the erase and program V_th. An artificial neural network (ANN) was used to model the relationship between the energetic-trap distributions as an input parameter and the V_th window as an output parameter. A well-trained ANN was used with the gradient-descent method to determine the specific inputs that maximize the outputs. The trap densities (N_TD and N_TA) and their standard deviations (σ_TD and σ_TA) were found to most strongly impact the V_th window. As they increased, the V_th window increased because of the availability of a larger number of trap sites. Finally, when the ML-optimized energetic-trap distributions were simulated, the V_th window increased by 49% compared with the experimental value under the same bias condition. Therefore, the developed ML technique can be applied to optimize cell transistor processes by determining the material properties of the CTN in 3D NAND Flash.