Xingfang Liu

Annealing is a critical process for tuning the performance of NiO/SiC heterostructures. However, high temperatures, while improving the intrinsic quality of the material, may also induce detrimental interfacial reactions. In this study, NiO films were deposited on 4 H–SiC substrates by magnetron sputtering, followed by annealing in an oxygen atmosphere at temperatures ranging from 350 °C to 550 °C. The results demonstrate that annealing has a dual effect on the heterostructure. Treatment at or below 400 °C effectively repairs defects, optimizes stoichiometric ratio, and significantly enhances crystallinity. However, when the temperature exceeds 450 °C, deep oxidation of NiO and interfacial reactions with the SiC substrate occur, resulting in increased surface roughness and the oxygen-rich particles. Electrical measurements reveal that the samples annealed at 400 °C exhibit the best overall performance. Due to the excellent thermal conductivity of the SiC substrate, heat generated during current flow is efficiently conducted in-plane, which effectively mitigates the negative effects of local heat accumulation on the film and interface structure. The fabricated p-NiO/n-SiC diode achieves a current density exceeding 200 A cm ⁻² and demonstrates good rectifying properties. This study confirms that 400 °C is the optimal annealing temperature that balances crystal quality improvement and side reaction suppression, providing valuable guidance for the controlled fabrication of high-performance NiO/SiC-based devices.

We demonstrated the controllable exfoliation of two-dimensional gallium oxide (2D-Ga2O3) thin films via a touch printing process that leverages the self-limiting oxidation behavior of liquid gallium. The resulting films exhibited high thickness uniformity and surface smoothness. After annealing at 800 °C for 1 h, the film thickness was reduced from 6.8 to 3.9 nm due to recrystallization. Furthermore, by precisely modulating the annealing parameters, we introduced point defects and promoted the formation of a Ga–Si–O solid solution, enabling continuous bandgap tunability within the range of 4.88–7.22 eV. This work establishes a clear correlation among annealing, defect evolution, and band structure modulation.

Cubic silicon carbide (3C-SiC) exhibits outstanding properties, making it a promising material for flexible sensors and wearable devices. In this study, 3C-SiC films with a thickness of 2.3 μ m were grown on Si substrates using chemical vapor deposition, and flexible films were subsequently obtained through mechanical exfoliation. Characterization results revealed a distinct morphological difference between the as-grown surface and buried surface, which may be associated with the accumulated stress and the exfoliation process. The fabricated 3C-SiC film demonstrates excellent quality and strength, and electrical measurements further highlight its potential applications in strain sensors.

To elucidate the mechanisms of material deformation and defect evolution in 4H-SiC epitaxial layer, this study proposes an innovative method named the scratch-etching method, to systematic investigate the defect evolution of 4H-SiC. To simulate the mechanical responses of the material under practical application conditions, nanoindentation and nano-scratch were conducted on the epitaxial layer. Subsequently, KOH etching was employed to reveal the structural characteristics of internal defects, such as dislocations and stacking faults. Detailed characterization of the electrical properties and crystal structure of different types of defects was performed. The results reveal that stress concentration is the main reason of defects in the 4H-SiC epitaxial process. In addition, the presence of threading mixed dislocation and threading screw dislocation may increase the leakage current in the 4H-SiC power devices.