Abdelkarim Zemmouri

Embedded vision systems play a crucial role in the advancement of intelligent transportation by supporting real-time perception tasks such as traffic sign recognition and lane detection. Despite significant progress, their performance remains sensitive to environmental variability, computational constraints, and scene complexity. This review examines the current state of the art in embedded vision approaches used for the detection and classification of traffic signs and lane markings. The literature is structured around three main stages, localization, detection, and recognition, highlighting how visual features like color, geometry, and road edges are processed through both traditional and learning-based methods. A major contribution of this work is the introduction of a practical taxonomy that organizes recognition techniques according to their computational load and real-time applicability in embedded contexts. In addition, the paper presents a critical synthesis of existing limitations, with attention to sensor fusion challenges, dataset diversity, and deployment in real-world conditions. By adopting the SALSA methodology, the review follows a transparent and systematic selection process, ensuring reproducibility and clarity. The study concludes by identifying specific research directions aimed at improving the robustness, scalability, and interpretability of embedded vision systems. These contributions position the review as a structured reference for researchers working on intelligent driving technologies and next-generation driver assistance systems. The findings are expected to inform future implementations of embedded vision systems in real-world driving environments.

This paper proposes a microsystem based on the field programmable gate arrays (FPGA) electronic board. The preliminary objective is to manipulate a programming language to achieve a control part capable of controlling the speed of electric actuators, such as direct current (DC) motors. The method proposed in this work is to control the speed of the DC motor by a purely embedded architecture within the FPGA in order to reduce the space occupied by the circuit to a minimum and to ensure the reliability of the system. The implementation of this system allows the embedded MicroBlaze processor to be installed side by side with its memory blocks provided by Xilinx very high-speed integrated circuit (VHSIC) hardware description language (VHDL), Embedded C. The control signal of digital pulse-width modulation pulses is generated by an embedded block managed by the same processor. This potential application is demonstrated by experimental simulation on the Vertix5 FPGA chip.

The vast majority of embedded system designs start with a processor-based system, using a microcontroller or microprocessor as the core element to predict and process the basic control tasks. This paper aims to increase the reliability of controlling a stepper motor by an embedded circuit, which generates four digital signals of pulse width modulation (PWM). The manager of this circuit is an embedded processor licensed from Microblaze, which sits within the FPGA architecture Virtex 5. This processor analyzes the parameters to execute the rotation under the best conditions (energy consumption, speed, precision, reliability). The communication with the PC takes place via the RS232 link to provide feedback. The autonomous processor generates an independent control frequency of the PC. The four digital signals of PWM are simulated on Xilinx's ISim interface and sent to the ULN2803 amplifier circuit to run the stepper motor.