Sudipto Mondal

In this paper, a modified Carrier Amplitude Shifted Pulse Width Modulation (CAS-PWM) technique is introduced that utilizes a new level-shifted carrier waveform and a modified modulation signal for three-level Neutral Point Clamped (NPC) inverter systems. The proposed CAS-PWM strategy is aimed at reducing output voltage total harmonic distortion (THD), inverter power losses, and thermal distribution on switching devices. Unlike traditional PWM methods, Phase Disposition (PD), Phase Opposition Disposition (POD), Alternate Phase Opposition Disposition (APOD), Interleaved Carrier (IC), Phase-Shifted Carrier (PSC) and other advanced carrier based control, the CASPWM modifies the carrier amplitude and modulation waveform at the same time to provide the suitable switching states. A comprehensive benchmarking is made with nine carrier methods and five existing modulation techniques such as SPWM, CSVPWM, THPWM, and SDPWM. The principle of the proposed CAS-PWM is to enhance the quality of the output voltage, to decrease the switching and conduction loss of power switches, and to improve the neutral-point capacitor voltage balancing as much as possible. The proposed scheme and overall system is verified through MATLAB/Simulink simulations and a 1-kW laboratory scaled prototype, demonstrating its suitability for photovoltaic (PV) grid integration. Overall, an extensive thermal analysis is conducted in PLECS computer simulation environment and real time hardware with a thermal imaging camera that indicates a significant decrease in IGBT junction temperature.

The use of neutral point clamped (NPC) multilevel inverters has significantly increased in recent decades, due to their appealing features compared to two-level voltage source inverters. In many industry-level applications, they suffer from high harmonic distortion, power loss, junction temperature of the semiconductor switches and dc-link capacitor voltage imbalance issues which are largely dependent on the switching pulse width modulation (PWM) technique used. This work presents a sub-flattened triangular carrier-based pulse width modulation (PWM) technique, which can mitigate the aforementioned issues. The proposed PWM technique is a combination of the modulating signal of existing third-harmonic injected PWM (THPWM) and a newly shaped, sub-flattened, modified triangular carrier signal. The carrier signal introduces a flattened region, which modifies the switching sequences of the power switches. This modification significantly affects the harmonic profile, charging and discharging time of the dc-link capacitors, the total power loss, switch junction temperature and efficiency of the inverter. A three-phase grid-connected T-type NPC inverter is considered to evaluate the performance of the proposed PWM technique. An extensive comparative performance analysis of the proposed PWM technique has been carried out against existing PWM methods. The evaluation considers key performance indicators, including inverter PWM voltage harmonic profile, dc-link capacitor voltage balancing, power losses, junction temperature of the switches, and overall inverter efficiency. Simulations have been conducted using MATLAB/Simulink and PLECS platforms. Furthermore, a reduced-scale laboratory prototype has been developed and experimentally validated to support the simulation results.

Among the various transformerless multilevel inverters (MLIs) used in grid-tied PV systems, single-phase switched-capacitor (SC) based MLIs have gained significant attention in recent decades because they require only a single power source, offer intrinsic self-voltage balancing of capacitors, and have reduced electromagnetic interference (EMI). Nonetheless, these converters face challenges such as utilizing multiple SCs to achieve only a five-level output voltage, a large number of semiconductor components, and high total harmonic distortion (THD). This paper proposes a more efficient multilevel transformerless inverter (MLTI) design for a single-phase application, featuring a single SC, six switches, and one diode to deliver a five-level voltage output. The proposed MLTI showcases self-voltage balancing, auto-boost functionality, and the capability to handle reactive power transmission. Moreover, the circuit architecture is generalized to produce n-level voltage output. Additionally, an advanced pulse width modulation (PWM) method, referred to as single-carrier third harmonic saturated PWM (SCTHSPWM), is introduced. This new MLTI design, combined with the SCTHSPWM method, achieves lower total harmonic distortion (THD) in the output voltage, minimizes power loss, and enhances thermal stability compared to some recent MLTI designs for PV applications. Simulations using MATLAB/Simulink and PLECS, along with a 1 kW laboratory test, are performed to demonstrate the effectiveness of the proposed MLTI.

Pulsewidth modulation (PWM) techniques play a crucial role in determining the power quality of multilevel-inverter-based grid-tied solar photovoltaic (PV) fed systems. However, the existing PWM techniques suffer from the heat dissipation of the switches and power loss issues. In view of this concern, a new PWM technique is proposed to mitigate the junction temperature as well as the power loss of a cascaded H-bridge (CHB) inverter employed in a grid-tied solar PV system. Apart from the junction temperature of the power switch and power loss, different steady-state and dynamic responses of the CHB inverter are investigated using MATLAB/Simulink and PLECS software environments. Experimental results are also provided to support the simulation analysis.

Transformerless grid-connected inverters are gaining popularity due to their high efficiency, compact design, and cost-effectiveness than transformer-based inverters. However, these inverters face significant challenges, particularly leakage current and limited voltage boost capability. This paper presents a novel solution to these issues through a five-level transformerless inverter (TLI) topology utilizing switched capacitors (SCs). The inverter utilizes seven insulated gate bipolar transistors (IGBTs), two diodes, and two SCs to achieve a five-level boosted output while ensuring low leakage current. Near-zero leakage current is enabled by maintaining a constant common mode voltage (CMV). Finite control set model predictive control (FCS-MPC), instead of traditional modulators, facilitates grid current tracking and reduced current harmonics. The use of only seven switches and two SCs results in increased efficiency and reduced losses. Comprehensive MATLAB/Simulink simulations and an experimental prototype validate the effectiveness of the proposed TLI for solar PV integration.

Multilevel inverters (MLIs) have significantly improved the overall performance, dependability and efficiency of the renewable energy system. Moreover, these can be easily integrated with the superconducting magnetic energy storage (SMES) systems. Maintaining the power qualities of these MLIs is always marked as a major research concern which can be heavily impacted by the pulse width modulation (PWM) strategies. An improved voltage balancing discontinuous PWM (DPWM) scheme is suggested in this work for the single-phase grid-tied 5-level neutral point clamped (NPC) inverter, which can significantly mitigate the fluctuation of the dc-link capacitor voltages as well as the switching losses of the power IGBTs. The reduction in switching losses will give lower thermal stress to the power devices. The proposed DPWM scheme is compared with other existing DPWM schemes for proving its effectiveness. The simulation of the entire system is performed by using MATLAB Simulink and PLECS simulation platform. A lower scale prototype is also constructed in the laboratory.

This article introduces a new structure of switched-capacitor (SC)-based three-phase single-source multilevel inverter (MLI), which is designed to generate nine different output voltage (line-to-line) levels. A low-voltage grid-feeding photovoltaic system is the perfect use case for the inverter. The switching pattern is modeled in such a way that during voltage generation, the main dc source gets isolated, and voltage is supplied based on the SC units. As a result, the voltage of SC units is balanced automatically, and the SC units also provide boosted output voltage up to four times higher than the single-input dc source. Comparing this to other series-connected SC-based inverter topologies, such as flying capacitor and neutral-point-clamped inverters, no additional control complexity is mandatory. The system can be made modular to produce a higher level voltage output as well. The MLI topology, along with the whole system, is simulated in MATLAB/Simulink and PLECS simulation environment. A laboratory-scaled prototype was also built to justify the theoretical claim more boldly.

Conventional finite state predictive torque control (FS-PTC) suffers from increased computational complexity, torque ripple, and switching losses due to using all the available voltage vectors for prediction and estimation. This paper presents an enhanced FS-PTC algorithm for two-level voltage source inverter (VSI) driven induction motor drives (IMDs). The proposed method significantly reduces computational complexity by optimizing the voltage vector selection process. Based on motor operating conditions and stator current position, this reduces the number of evaluated vectors from eight to five. This optimization achieves a 24% reduction in execution time to 29.03 μs, compared to 36.06 μs for conventional FS-PTC, while maintaining excellent dynamic response. Additionally, the proposed approach reduces inverter switching losses and demonstrates improved performance metrics, including reduced torque ripple (2.35%), flux ripple (0.026%), and total harmonic distortion (7.06%) compared to the conventional method. Simulation results and experimental validation on a prototype confirm the effectiveness of the proposed strategy in enhancing computational efficiency and overall drive performance.