Jason D. Chadwick
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Research Subjects
Jason D. Chadwick has a total of 22 co-authors. Here are the top co-authors by number of shared publications:
- Andrew Litteken
Intel Corporation
2 shared publications - Frederic T. Chong
Department of Computer Science, University of Chicago, Chicago, IL, USA
2 shared publications Albert T. Schmitz
Intel Corporation
1 shared publicationAnne Y. Matsuura
Intel Corporation
1 shared publication- David I. Schuster
Stanford University
1 shared publication Fahd A. Mohiyaddin
Intel Corporation
1 shared publication
Latest Publications
- Open Access
- 20 June 2025
- Published by Association for Computing Machinery (ACM)
- p. 1386-1401
SWIPER: Minimizing Fault-Tolerant Quantum Program Latency via Speculative Window Decoding
- 20 June 2025
- Published by Association for Computing Machinery (ACM)
- p. 1386-1401
Open AccessSWIPER: Minimizing Fault-Tolerant Quantum Program Latency via Speculative Window Decoding
- Open Access
- 16 May 2025
- Published by American Physical Society (APS) in Physical Review A
- Vol. 111 (5)
Short two-qubit pulse sequences for exchange-only spin qubits in two-dimensional layouts
Exchange-only (EO) spin qubits in quantum dots offer an expansive design landscape for engineering scalable device layouts. The study of two-EO-qubit operations, which involve six electrons in six quantum dots, has so far been limited to a small number of possible configurations, and previous works lack analyses of design considerations and implications for quantum error correction. Using a simple and fast optimization method, we generate complete pulse sequences for , , i , leakage-controlled , and leakage-controlled two-qubit gates on 450 unique planar six-dot topologies and analyze differences in sequence length (up to 43% reduction) across topology classes. In addition, we show that relaxing constraints on postoperation spin locations can yield further reductions in sequence length; conversely, constraining these locations in a particular way generates a operation with minimal additional cost over a standard . We integrate this pulse library into the Intel quantum stack and experimentally verify pulse sequences on a Tunnel Falls chip for different operations in a linear-connectivity device to confirm that they work as expected. Finally, we explore architectural implications of these results for quantum error correction. Our work guides hardware and software design choices for future implementations of scalable quantum-dot architectures. Published by the American Physical Society 2025
- 16 May 2025
- Published by American Physical Society (APS) in Physical Review A
- Vol. 111 (5)
Open AccessShort two-qubit pulse sequences for exchange-only spin qubits in two-dimensional layouts
Exchange-only (EO) spin qubits in quantum dots offer an expansive design landscape for engineering scalable device layouts. The study of two-EO-qubit operations, which involve six electrons in six quantum dots, has so far been limited to a small number of possible configurations, and previous works lack analyses of design considerations and implications for quantum error correction. Using a simple and fast optimization method, we generate complete pulse sequences for , , i , leakage-controlled , and leakage-controlled two-qubit gates on 450 unique planar six-dot topologies and analyze differences in sequence length (up to 43% reduction) across topology classes. In addition, we show that relaxing constraints on postoperation spin locations can yield further reductions in sequence length; conversely, constraining these locations in a particular way generates a operation with minimal additional cost over a standard . We integrate this pulse library into the Intel quantum stack and experimentally verify pulse sequences on a Tunnel Falls chip for different operations in a linear-connectivity device to confirm that they work as expected. Finally, we explore architectural implications of these results for quantum error correction. Our work guides hardware and software design choices for future implementations of scalable quantum-dot architectures. Published by the American Physical Society 2025
- Open Access
- 17 June 2023
- Published by Association for Computing Machinery (ACM)
- p. 1-14
Dancing the Quantum Waltz: Compiling Three-Qubit Gates on Four Level Architectures
Superconducting quantum devices are a leading technology for quantum computation, but they face several challenges. Gate errors, coherence errors and a lack of connectivity all contribute to low fidelity results. In particular, connectivity restrictions enforce a gate set that requires three-qubit gates to be decomposed into one- or two-qubit gates. This substantially increases the number of two-qubit gates that need to be executed. However, many quantum devices have access to higher energy levels. We can expand the qubit abstraction of |0〉 and |1〉 to a ququart which has access to the |2〉 and |3〉 state, but with shorter coherence times. This allows for two qubits to be encoded in one ququart, enabling increased virtual connectivity between physical units from two adjacent qubits to four fully connected qubits. This connectivity scheme allows us to more efficiently execute three-qubit gates natively between two physical devices. We present direct-to-pulse implementations of several three-qubit gates, synthesized via optimal control, for compilation of three-qubit gates onto a superconducting-based architecture with access to four-level devices with the first experimental demonstration of four-level ququart gates designed through optimal control. We demonstrate strategies that temporarily use higher level states to perform Toffoli gates and always use higher level states to improve fidelities for quantum circuits. We find that these methods improve expected fidelities with increases of 2x across circuit sizes using intermediate encoding, and increases of 3x for fully-encoded ququart compilation.
- 17 June 2023
- Published by Association for Computing Machinery (ACM)
- p. 1-14
Open AccessDancing the Quantum Waltz: Compiling Three-Qubit Gates on Four Level Architectures
Superconducting quantum devices are a leading technology for quantum computation, but they face several challenges. Gate errors, coherence errors and a lack of connectivity all contribute to low fidelity results. In particular, connectivity restrictions enforce a gate set that requires three-qubit gates to be decomposed into one- or two-qubit gates. This substantially increases the number of two-qubit gates that need to be executed. However, many quantum devices have access to higher energy levels. We can expand the qubit abstraction of |0〉 and |1〉 to a ququart which has access to the |2〉 and |3〉 state, but with shorter coherence times. This allows for two qubits to be encoded in one ququart, enabling increased virtual connectivity between physical units from two adjacent qubits to four fully connected qubits. This connectivity scheme allows us to more efficiently execute three-qubit gates natively between two physical devices. We present direct-to-pulse implementations of several three-qubit gates, synthesized via optimal control, for compilation of three-qubit gates onto a superconducting-based architecture with access to four-level devices with the first experimental demonstration of four-level ququart gates designed through optimal control. We demonstrate strategies that temporarily use higher level states to perform Toffoli gates and always use higher level states to improve fidelities for quantum circuits. We find that these methods improve expected fidelities with increases of 2x across circuit sizes using intermediate encoding, and increases of 3x for fully-encoded ququart compilation.