Seenithangam Jeevananthan
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Research Subjects
Seenithangam Jeevananthan has a total of 64 co-authors. Here are the top co-authors by number of shared publications:
- Ramasamy Sridhar
SRM University
6 shared publications - Chokkalingam Bharatiraja
Department of Electrical Electronics Engineering, Centre for Electric Mobility, SRM Institute of Science and Technology, Kattankulathur, Tamil Nadu, India
5 shared publications K. Ramash Kumar
Department of Electrical and Electronic Engineering, Jawaharlal Nehru Technological University, Hyderabad, Andhra Pradesh, India
4 shared publicationsP. Dananjayan
Deparment of EEE, Pondicherry Engineering College, INDIA
4 shared publicationsS. Ramkumar
RMD Engineering College
4 shared publicationsS. Thamizharasan
4 shared publications
Latest Publications
- Open Access
A Reconfigurable 10 kW String Inverter Topology for Unified Symmetric and Asymmetric Multilevel AC Grid Integration
Multilevel inverters (MLI) have become the frontier in high-power medium voltage systems because of their unique property of generating sinusoidal voltage through smaller voltage increments. Although many MLI structures have been proposed over the years, most still rely on a large number of switches, which increases complexity and conduction losses. In this work, a reconfigurable, gable-shaped multilevel inverter module, capable of operating in both symmetric and asymmetric modes, is introduced for use in AC microgrid cluster environments. The design employs five DC sources and six semiconductor devices arranged in a gable layout, which helps shorten the conduction path while also reducing the total hardware count. As a result, the inverter becomes more compact, experiences lower switching losses, and proves more suitable for grid-connected operation. In symmetric mode, the inverter delivers an 11-level output, while the asymmetric arrangement produces 19 levels. The proposed concept is examined through MATLAB/Simulink (R2023a) studies, and its practicality is verified using a Hardware-in-the-Loop setup with an integrated data-acquisition system capable of delivering 10 kW of real power and handling up to 50% overload. These results confirm the suitability of the topology for real-time grid applications.
Open AccessA Reconfigurable 10 kW String Inverter Topology for Unified Symmetric and Asymmetric Multilevel AC Grid Integration
Multilevel inverters (MLI) have become the frontier in high-power medium voltage systems because of their unique property of generating sinusoidal voltage through smaller voltage increments. Although many MLI structures have been proposed over the years, most still rely on a large number of switches, which increases complexity and conduction losses. In this work, a reconfigurable, gable-shaped multilevel inverter module, capable of operating in both symmetric and asymmetric modes, is introduced for use in AC microgrid cluster environments. The design employs five DC sources and six semiconductor devices arranged in a gable layout, which helps shorten the conduction path while also reducing the total hardware count. As a result, the inverter becomes more compact, experiences lower switching losses, and proves more suitable for grid-connected operation. In symmetric mode, the inverter delivers an 11-level output, while the asymmetric arrangement produces 19 levels. The proposed concept is examined through MATLAB/Simulink (R2023a) studies, and its practicality is verified using a Hardware-in-the-Loop setup with an integrated data-acquisition system capable of delivering 10 kW of real power and handling up to 50% overload. These results confirm the suitability of the topology for real-time grid applications.
- Open Access
- 6 June 2023
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Access
- Vol. 11, 57365-57382
An Alternative Level Enhanced Switching Angle Modulation Schemes for Cascaded H Bridge Multilevel Inverters
This paper suggests an alternate level enhancing algorithm to operate the nine-level cascaded multilevel inverter (CHBMLI) for a 31-level output, which involves an inventive selection of optimal asymmetrical voltage values in separate DC sources (SDCs) and a quarter-wave symmetry pulse pattern pulse width modulation (QSP-PWM). The symmetrical CHBMLI structure involves the same DCs with an objectionable value of component count, especially at higher level outputs; consequently, there is a need to reduce the component count. It can be supported largely by the optimal set of asymmetrical voltage values (say 1:2:4:8), such an actualization is quite easy with photovoltaic (PV) applications. Additionally, many of the commonly used PWM methods of MLI are tedious especially when it comes to the generation of pulses. This paper also engraves a straightforward switching strategy apposite to the developed MLI topology. In addition, three new switching angle modulation schemes have been proposed to get the optimum performance, namely, incremental delay switching angle modulation scheme, random delay switching angle modulation scheme and sine referencing-based switching angle modulation scheme. The preliminary study on the tenet of suggested topology is done theoretically, then the performance is analyzed in MATLAB2019a software and finally, experimentally corroborated on a proof-of-concept (POC) prototype with the aid of ModelSim6.3f hardware description language simulation environment, Xilinx 14.5 project navigator tool and XC3S500E field-programmable-gate-array processor. The tested results for the inductive load demonstrate the output voltage synthesizing and the total harmonic distortion curtailment savvies of the proposed MLI and the switching strategies.
- 6 June 2023
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Access
- Vol. 11, 57365-57382
Open AccessAn Alternative Level Enhanced Switching Angle Modulation Schemes for Cascaded H Bridge Multilevel Inverters
This paper suggests an alternate level enhancing algorithm to operate the nine-level cascaded multilevel inverter (CHBMLI) for a 31-level output, which involves an inventive selection of optimal asymmetrical voltage values in separate DC sources (SDCs) and a quarter-wave symmetry pulse pattern pulse width modulation (QSP-PWM). The symmetrical CHBMLI structure involves the same DCs with an objectionable value of component count, especially at higher level outputs; consequently, there is a need to reduce the component count. It can be supported largely by the optimal set of asymmetrical voltage values (say 1:2:4:8), such an actualization is quite easy with photovoltaic (PV) applications. Additionally, many of the commonly used PWM methods of MLI are tedious especially when it comes to the generation of pulses. This paper also engraves a straightforward switching strategy apposite to the developed MLI topology. In addition, three new switching angle modulation schemes have been proposed to get the optimum performance, namely, incremental delay switching angle modulation scheme, random delay switching angle modulation scheme and sine referencing-based switching angle modulation scheme. The preliminary study on the tenet of suggested topology is done theoretically, then the performance is analyzed in MATLAB2019a software and finally, experimentally corroborated on a proof-of-concept (POC) prototype with the aid of ModelSim6.3f hardware description language simulation environment, Xilinx 14.5 project navigator tool and XC3S500E field-programmable-gate-array processor. The tested results for the inductive load demonstrate the output voltage synthesizing and the total harmonic distortion curtailment savvies of the proposed MLI and the switching strategies.
- 13 June 2022
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Emerging and Selected Topics in Power Electronics
- Vol. 11 (4) , 4442-4452
Toward Energy Sustainability—Domestic Power Station, Tariff Acquiescent EMS, and Procedure to Rejuvenate Petrol Scooter Into Electric Scooter for Accelerated Participation of Rural Consumers in Energy Demand Management
The future domestic power stations (DPSs) will not remain as what it is today. Today, rural houses have the power supply connection provided by government/ private agencies and the reliability is abetted by the battery-backed inverters. Domestic consumers started thinking of a micro-level power generation to confront the incessantly rising electricity bill through a grid export (during their excess generation and grid’s peak hours) and a local storage (during grid’s off-peak hours). Furthermore, the persuaded merits of the DC lighting system over the conventional AC lighting system exhorts the availability of the DC power in addition to the AC power in the DPS. The objectives of this paper are in three folds. The first one is the development of a future photovoltaic (PV) power generation involved DPS consisting of an inventive multiport converter (MPC), which supports the grid integration and also accommodates hybrid (AC and DC) loads. The second objective is the development of a novel tariff acquiescent energy management system (TAEMS) to ensure an optimal electricity bill. Thus, the suggested DPS can support almost all essential needs of a domestic consumer in terms of lighting, cooking, air circulation, and charging electronic gadgets, except the gasoline vehicles. The recent scrappage policy suggested by the Indian government to phase out old vehicles, the rising fossil fuel price, and the stringent emission standards result in the underutilization of vehicles, particularly two-wheelers of the personal usage. The owners are reluctant to phase out their two-wheelers at the scrap rate after a minimal usage. In the majority of the cases, the mechanical strength and the appearance of vehicles seem to be good. The third objective is effectively rejuvenating the registration expired petrol scooter into an electric scooter to extend the vehicle life at a minimal cost. As a whole, the suggested DPS, the EMS, and the electric scooter rejuvenation procedure serve the domestic consumer with required days of power autonomy, accelerates more participation of rural roof-top solar (RTS) costumers and also moves the earth towards the energy sustainability. The entire system is contemplated theoretically, simulated in MATLAB software, and corroborated using a proof-of-concept (PoC) prototype supported by a field-programmable gate array (FPGA) processor.
- 13 June 2022
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Emerging and Selected Topics in Power Electronics
- Vol. 11 (4) , 4442-4452
Toward Energy Sustainability—Domestic Power Station, Tariff Acquiescent EMS, and Procedure to Rejuvenate Petrol Scooter Into Electric Scooter for Accelerated Participation of Rural Consumers in Energy Demand Management
The future domestic power stations (DPSs) will not remain as what it is today. Today, rural houses have the power supply connection provided by government/ private agencies and the reliability is abetted by the battery-backed inverters. Domestic consumers started thinking of a micro-level power generation to confront the incessantly rising electricity bill through a grid export (during their excess generation and grid’s peak hours) and a local storage (during grid’s off-peak hours). Furthermore, the persuaded merits of the DC lighting system over the conventional AC lighting system exhorts the availability of the DC power in addition to the AC power in the DPS. The objectives of this paper are in three folds. The first one is the development of a future photovoltaic (PV) power generation involved DPS consisting of an inventive multiport converter (MPC), which supports the grid integration and also accommodates hybrid (AC and DC) loads. The second objective is the development of a novel tariff acquiescent energy management system (TAEMS) to ensure an optimal electricity bill. Thus, the suggested DPS can support almost all essential needs of a domestic consumer in terms of lighting, cooking, air circulation, and charging electronic gadgets, except the gasoline vehicles. The recent scrappage policy suggested by the Indian government to phase out old vehicles, the rising fossil fuel price, and the stringent emission standards result in the underutilization of vehicles, particularly two-wheelers of the personal usage. The owners are reluctant to phase out their two-wheelers at the scrap rate after a minimal usage. In the majority of the cases, the mechanical strength and the appearance of vehicles seem to be good. The third objective is effectively rejuvenating the registration expired petrol scooter into an electric scooter to extend the vehicle life at a minimal cost. As a whole, the suggested DPS, the EMS, and the electric scooter rejuvenation procedure serve the domestic consumer with required days of power autonomy, accelerates more participation of rural roof-top solar (RTS) costumers and also moves the earth towards the energy sustainability. The entire system is contemplated theoretically, simulated in MATLAB software, and corroborated using a proof-of-concept (PoC) prototype supported by a field-programmable gate array (FPGA) processor.
- 30 June 2016
- Published by Praise Worthy Prize in International Review of Electrical Engineering (IREE)
- Vol. 11 (3) , 247
Ripple Reduction in BLDC Motor Based on Cascaded DC-DC Converter
- 30 June 2016
- Published by Praise Worthy Prize in International Review of Electrical Engineering (IREE)
- Vol. 11 (3) , 247
Ripple Reduction in BLDC Motor Based on Cascaded DC-DC Converter
- 13 June 2016
- Published by Taylor & Francis in Journal of Experimental & Theoretical Artificial Intelligence
- Vol. 29 (3) , 481-493
A new maximum power tracking in PV system during partially shaded conditions based on shuffled frog leap algorithm
Maximum Power Point Trackers (MPPTs) are power electronic conditioners used in photovoltaic (PV) system to ensure that PV structures feed maximum power for the given ambient temperature and sun’s irradiation. When the PV panels are shaded by a fraction due to any environment hindrances then, conventional MPPT trackers may fail in tracking the appropriate peak power as there will be multi power peaks. In this work, a shuffled frog leap algorithm (SFLA) is proposed and it successfully identifies the global maximum power point among other local maxima. The SFLA MPPT is compared with a well-entrenched conventional perturb and observe (P&O) MPPT algorithm and a global search particle swarm optimisation (PSO) MPPT. The simulation results reveal that the proposed algorithm is highly advantageous than P&O, as it tracks nearly 30% more power for a given shading pattern. The credible nature of the proposed SFLA is ensured when it outplays PSO MPPT in convergence. The whole system is realised in MATLAB/Simulink environment.
- 13 June 2016
- Published by Taylor & Francis in Journal of Experimental & Theoretical Artificial Intelligence
- Vol. 29 (3) , 481-493
A new maximum power tracking in PV system during partially shaded conditions based on shuffled frog leap algorithm
Maximum Power Point Trackers (MPPTs) are power electronic conditioners used in photovoltaic (PV) system to ensure that PV structures feed maximum power for the given ambient temperature and sun’s irradiation. When the PV panels are shaded by a fraction due to any environment hindrances then, conventional MPPT trackers may fail in tracking the appropriate peak power as there will be multi power peaks. In this work, a shuffled frog leap algorithm (SFLA) is proposed and it successfully identifies the global maximum power point among other local maxima. The SFLA MPPT is compared with a well-entrenched conventional perturb and observe (P&O) MPPT algorithm and a global search particle swarm optimisation (PSO) MPPT. The simulation results reveal that the proposed algorithm is highly advantageous than P&O, as it tracks nearly 30% more power for a given shading pattern. The credible nature of the proposed SFLA is ensured when it outplays PSO MPPT in convergence. The whole system is realised in MATLAB/Simulink environment.
- Open Access
- 1 June 2016
- Published by Institution of Engineering and Technology (IET) in IET Power Electronics
- Vol. 9 (7) , 1350-1361
Vector selection approach‐based hexagonal hysteresis space vector current controller for a three phase diode clamped MLI with capacitor voltage balancing
The purpose of this study is to provide a broad idea about current control scheme and equilibrating voltages in DC‐link capacitors of the neutral‐point clamped multilevel inverter (NPC‐MLI), using an innovative hexagonal space vector hysteresis current control (SVHCC) scheme. The main ideology is to force the literal current vector to reach the reference current vector through an appropriate voltage vector selection sequence. This proposed scheme defines two hexagonal hysteresis bands encompassing the error vector, as a first step. With respect to the error vector location, the selection of the adjacent vector is acted to minimise the error vector. In addition to the error vector selection, the capacitor voltage is also equilibrated by controlling the degree of freedom available in selecting the switching vectors. The SVHCC scheme is intelligent in performing modulation depth dependent selection of switching vectors between the groups namely closest three vector and preferred three vector (PTV). This scheme balances the DC‐link capacitors’ voltages within a tolerance limit for any value of modulation index. The proposed scheme is asserted through MATLAB/Simulink software. The superiority of the proposed technique is validated through the 2 kW NPC‐MLI supported with SPARTAN III 3AN –XC3S400 field programmable gate array.
- 1 June 2016
- Published by Institution of Engineering and Technology (IET) in IET Power Electronics
- Vol. 9 (7) , 1350-1361
Open AccessVector selection approach‐based hexagonal hysteresis space vector current controller for a three phase diode clamped MLI with capacitor voltage balancing
The purpose of this study is to provide a broad idea about current control scheme and equilibrating voltages in DC‐link capacitors of the neutral‐point clamped multilevel inverter (NPC‐MLI), using an innovative hexagonal space vector hysteresis current control (SVHCC) scheme. The main ideology is to force the literal current vector to reach the reference current vector through an appropriate voltage vector selection sequence. This proposed scheme defines two hexagonal hysteresis bands encompassing the error vector, as a first step. With respect to the error vector location, the selection of the adjacent vector is acted to minimise the error vector. In addition to the error vector selection, the capacitor voltage is also equilibrated by controlling the degree of freedom available in selecting the switching vectors. The SVHCC scheme is intelligent in performing modulation depth dependent selection of switching vectors between the groups namely closest three vector and preferred three vector (PTV). This scheme balances the DC‐link capacitors’ voltages within a tolerance limit for any value of modulation index. The proposed scheme is asserted through MATLAB/Simulink software. The superiority of the proposed technique is validated through the 2 kW NPC‐MLI supported with SPARTAN III 3AN –XC3S400 field programmable gate array.
- 29 May 2016
- Published by Taylor & Francis in International Journal of Ambient Energy
- Vol. 38 (7) , 685-693
Particle swarm optimisation maximum power-tracking approach based on irradiation and temperature measurements for a partially shaded photovoltaic system
This paper deals with enhancement of output power of a photovoltaic (PV) array when it is under partially shaded conditions. Since a PV array under shading exhibits non-linear multimodal output power–voltage (P–V) characteristics with respect to irradiation and ambient temperature, mundane maximum power point tracking techniques may go futile. In this paper a soft computing technique called particle swarm optimisation is suggested for maximum power tracking. The prime advantage of the suggested technique over existing conventional techniques is that it finds the global maximum peak whereas the conventional algorithm gets stuck with local maxima. The proposed method is also tested in a prototype by incorporating appropriate temperature, irradiation sensors, voltage and current sensors. The simulation and hardware results reveal that the said technique is effective and efficient for power tracking in PV systems exposed to in-homogenous radiations (partial shading).
- 29 May 2016
- Published by Taylor & Francis in International Journal of Ambient Energy
- Vol. 38 (7) , 685-693
Particle swarm optimisation maximum power-tracking approach based on irradiation and temperature measurements for a partially shaded photovoltaic system
This paper deals with enhancement of output power of a photovoltaic (PV) array when it is under partially shaded conditions. Since a PV array under shading exhibits non-linear multimodal output power–voltage (P–V) characteristics with respect to irradiation and ambient temperature, mundane maximum power point tracking techniques may go futile. In this paper a soft computing technique called particle swarm optimisation is suggested for maximum power tracking. The prime advantage of the suggested technique over existing conventional techniques is that it finds the global maximum peak whereas the conventional algorithm gets stuck with local maxima. The proposed method is also tested in a prototype by incorporating appropriate temperature, irradiation sensors, voltage and current sensors. The simulation and hardware results reveal that the said technique is effective and efficient for power tracking in PV systems exposed to in-homogenous radiations (partial shading).
- 17 March 2016
- Published by Emerald Publishing in COMPEL - The international journal for computation and mathematics in electrical and electronic engineering
- Vol. 35 (3)
Reducing torque ripple of BLDC motor by integrating DC-DC converter with three-level neutral-point-clamped inverter
Purpose This paper presents a novel circuit topology based on a three-level neutral-point-clamped (NPC) inverter and a super-lift Luo-converter for minimizing torque ripple in a brushless DC motor (BLDCM) drive system. In the BLDCM, the stator winding inductance generates current ripple, distort the rectangular current shape, which produces the torque ripples. In addition, the torque ripple generates vibration, speed ripple and prevents the use of BLDCM in high-precision servo drive systems Design/methodology/approach Torque ripple can be mitigated by using the three-level NPC inverter, which applies half of dc-link voltage across the BLDCM terminals and this reduces the torque ripple during non-commutation period. The commutation torque ripple is reduced by employing the super-lift Luo-converter at the input of the three-level NPC inverter, which lifts the dc-link voltage to the desired value depending upon the BLDCM speed. Simulations and experimental results show that the proposed circuit topology is an attractive option to reduce the torque ripple significantly. Findings Experimental results show that the proposed topology can reduces the torque ripple significantly at higher speed, and operates with lower power losses than the two-level inverter-fed BLDCM drive system at higher switching frequency. Originality/value This paper has proposed a novel topology using a super-lift Luo-converter and a three-level NPC inverter to address the torque ripple issue in BLDCM drive system.
- 17 March 2016
- Published by Emerald Publishing in COMPEL - The international journal for computation and mathematics in electrical and electronic engineering
- Vol. 35 (3)
Reducing torque ripple of BLDC motor by integrating DC-DC converter with three-level neutral-point-clamped inverter
Purpose This paper presents a novel circuit topology based on a three-level neutral-point-clamped (NPC) inverter and a super-lift Luo-converter for minimizing torque ripple in a brushless DC motor (BLDCM) drive system. In the BLDCM, the stator winding inductance generates current ripple, distort the rectangular current shape, which produces the torque ripples. In addition, the torque ripple generates vibration, speed ripple and prevents the use of BLDCM in high-precision servo drive systems Design/methodology/approach Torque ripple can be mitigated by using the three-level NPC inverter, which applies half of dc-link voltage across the BLDCM terminals and this reduces the torque ripple during non-commutation period. The commutation torque ripple is reduced by employing the super-lift Luo-converter at the input of the three-level NPC inverter, which lifts the dc-link voltage to the desired value depending upon the BLDCM speed. Simulations and experimental results show that the proposed circuit topology is an attractive option to reduce the torque ripple significantly. Findings Experimental results show that the proposed topology can reduces the torque ripple significantly at higher speed, and operates with lower power losses than the two-level inverter-fed BLDCM drive system at higher switching frequency. Originality/value This paper has proposed a novel topology using a super-lift Luo-converter and a three-level NPC inverter to address the torque ripple issue in BLDCM drive system.
- 1 March 2016
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 162-167
Performance evaluation of competent AC-AC power conversion systems
AC-AC power conversion has become mandate for modern AC loads due to their standardized supply specifications and unavoidable options of being fed with common AC supply. This paper describes a comprehensive comparison of two competent AC-AC power conversion systems viz. diode bridge front end rectifier-DC link (capacitor)-pulse width modulated voltage source inverter (PWM-VSI) and matrix converter (MC). Though, the survival of VSI based systems largely fuelled by time to time application demanded modifications of PWM strategy, they suffer by poor input side performance, output voltage restriction etc. Highly motivated remedy for this issue is employing MC in AC-AC conversion. The system replacement may only be justified if comprehensive performance comparison of both is studied. Comparison on the basis of harmonic profile, range and controllability of output line voltage, and power factor and harmonic profile of the input current using MATLAB 13-Simulink (Ode 23tb-solver) tool for the RL load is presented.
- 1 March 2016
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 162-167
Performance evaluation of competent AC-AC power conversion systems
AC-AC power conversion has become mandate for modern AC loads due to their standardized supply specifications and unavoidable options of being fed with common AC supply. This paper describes a comprehensive comparison of two competent AC-AC power conversion systems viz. diode bridge front end rectifier-DC link (capacitor)-pulse width modulated voltage source inverter (PWM-VSI) and matrix converter (MC). Though, the survival of VSI based systems largely fuelled by time to time application demanded modifications of PWM strategy, they suffer by poor input side performance, output voltage restriction etc. Highly motivated remedy for this issue is employing MC in AC-AC conversion. The system replacement may only be justified if comprehensive performance comparison of both is studied. Comparison on the basis of harmonic profile, range and controllability of output line voltage, and power factor and harmonic profile of the input current using MATLAB 13-Simulink (Ode 23tb-solver) tool for the RL load is presented.