Joung-Ho Lee

With the improvement of integration levels to several nanometers or less, semiconductor leakage current has become an important issue, and oxide-based semiconductors, which have replaced Si-based channel layer semiconductors, have attracted attention. Herein, we fabricated capacitors with a metal–insulator–semiconductor–metal structure using HfO₂ thin films deposited at 240 °C and TiO₂ thin films deposited at 300 °C via remote plasma (RP) and direct plasma (DP) atomic layer deposition and analyzed the effects of the charge-trapping and semiconducting properties of these films. Charge-trapping memory (CTM) devices with HfO₂ (charge-trapping layer) and TiO₂ (semiconductor) films were fabricated and characterized in terms of their memory properties. Al₂O₃ thin films were used as blocking and tunneling layers to prevent the leakage of charges stored in the charge-trapping layer. For the TiO₂ layer, the heat-treatment temperature was optimized to obtain an anatase phase with optimal semiconductor properties. The memory characteristics of the RP HfO₂–TiO₂ CTM devices were superior to those of the DP HfO₂–TiO₂ CTM devices. This result was ascribed to the decrease in the extent of damage and contamination observed when the plasma was spaced apart from the deposited HfO₂ and TiO₂ layers (i.e., in the case of RP deposition) and the reduction in the concentration of oxygen vacancies at the interface and in the films.

Plasma-enhanced atomic layer deposition (ALD) is a common method for fabricating Hf_0.5Zr_0.5O₂ (HZO) ferroelectric thin films that can be performed using direct-plasma (DP) and remote-plasma (RP) methods. This study proposed co-plasma ALD (CPALD), where DPALD and RPALD are applied simultaneously. HZO films fabricated using this method showed wake-up-free polarization properties, no anti-ferroelectricity, and high fatigue endurance when DPALD and RPALD started simultaneously. To minimize defects in the film that could negatively affect the low polarization properties and fatigue endurance, the direct plasma power was reduced to 75 W. Thus, excellent fatigue endurance for at least 10⁹ cycles was obtained under a high total remanent polarization of 47.3 μC/cm² and an applied voltage of 2.5 V. X-ray photoelectron spectroscopy and transmission electron microscopy were used to investigate the mechanisms responsible for these properties. The HZO films fabricated by CPALD contained few lattice defects (such as nonstoichiometric hafnium, nonlattice oxygen, and residual carbon) and no paraelectric phase (m-phase). This was attributed to the low-carbon residuals in the film, as high-energy activated radicals were supplied by the adsorbed precursors during film formation. This facilitated a smooth transition to the o-phase during heat treatment, which possessed ferroelectric properties.

We aimed to fabricate reliable memory devices using HfO₂, which is gaining attention as a charge-trapping layer material for next-generation NAND flash memory. To this end, a new atomic layer deposition process using sequential remote plasma (RP) and direct plasma (DP) was designed to create charge-trapping memory devices. Subsequently, the operational characteristics of the devices were analyzed based on the thickness ratio of thin films deposited using the sequential RP and DP processes. As the thickness of the initially RP-deposited thin film increased, the memory window and retention also increased, while the interface defect density and leakage current decreased. When the thickness of the RP-deposited thin film was 7 nm, a maximum memory window of 10.1 V was achieved at an operating voltage of ±10 V, and the interface trap density (D_it) reached a minimum value of 1.0 × 10¹² eV⁻¹cm⁻². Once the RP-deposited thin film reaches a certain thickness, the ion bombardment effect from DP on the substrate is expected to decrease, improving the Si/SiO₂/HfO₂ interface and thereby enhancing device endurance and reliability. This study confirmed that the proposed sequential RP and DP deposition processes could resolve issues related to unstable interface layers, improve device performance, and enhance process throughput.

To develop plasma-resistant glass materials suitable for semiconductor etching processes, we introduced alkaline earth oxides (ROs) into a Li₂O–Al₂O₃–SiO₂ (LAS) glass. Analysis of glass properties with respect to the additives revealed that among the analyzed materials, the LAS material in which Li₂O was partially replaced by MgO (MLAS) exhibited the most favorable characteristics, including a low dielectric constant (6.3) and thermal expansion coefficient (2.302 × 10⁻⁶/°C). The high performance of MLAS is attributed to the high ionic field strength of Mg²⁺ ions, which restricts the movement of Li⁺ ions under the influence of electric fields and thermal vibrations at elevated temperatures. When exposed to CF₄/O₂/Ar plasma, the etching speed of RO-doped glasses decreased compared with that of quartz and LAS glass, primarily owing to the generation of a high-sublimation-point fluoride layer on the surface. Herein, MLAS demonstrated the slowest etching speed, indicating exceptional plasma resistance. X-ray photoelectron spectroscopy analysis conducted immediately after plasma etching revealed that the oxidation-to-fluorination ratio of Li was the lowest for MLAS. This observation suggests that the presence of Mg²⁺ ions in the plasma discharge inhibits the migration of Li⁺ ions toward the surface, thereby contributing to the excellent plasma resistance of MLAS.

Optimization of equipment structure and process conditions is essential to obtain thin films with the required properties, such as film thickness, trapped charge density, leakage current, and memory characteristics, that ensure reliability of the corresponding device. In this study, we fabricated metal–insulator–semiconductor (MIS) structure capacitors using HfO₂ thin films separately deposited by remote plasma (RP) atomic layer deposition (ALD) and direct-plasma (DP) ALD and determined the optimal process temperature by measuring the leakage current and breakdown strength as functions of process temperature. Additionally, we analyzed the effects of the plasma application method on the charge trapping properties of HfO₂ thin films and properties of the interface between Si and HfO₂. Subsequently, we synthesized charge-trapping memory (CTM) devices utilizing the deposited thin films as charge-trapping layers (CTLs) and evaluated their memory properties. The results indicated excellent memory window characteristics of the RP-HfO₂ MIS capacitors compared to those of the DP-HfO₂ MIS capacitors. Moreover, the memory characteristics of the RP-HfO₂ CTM devices were outstanding as compared to those of the DP-HfO₂ CTM devices. In conclusion, the methodology proposed herein can be useful for future implementations of multiple levels of charge-storage nonvolatile memories or synaptic devices that require many states.