Alaleh Tajalli
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Alaleh Tajalli has a total of 16 co-authors. Here are the top co-authors by number of shared publications:
- Elke Meissner
Fraunhofer Institute for Integrated Systems and Device Technology IISB, Department Materials, Schottkystraße 10, 91058 Erlangen, Germany
2 shared publications - Enrico Zanoni
University of Padova
2 shared publications - Farid Medjdoub
IEMN, CNRS, Université de Lille 2 , 59650 Villeneuve d'Ascq
2 shared publications - Gaudenzio Meneghesso
University of Padova
2 shared publications - Idriss Abid
IEMN-CNRS, 59652 Villeneuve d’Ascq, France
2 shared publications - Joff Derluyn
EpiGaN, 3500 Hasselt, Belgium
2 shared publications
Latest Publications
- Open Access
High Breakdown Voltage and Low Buffer Trapping in Superlattice GaN-on-Silicon Heterostructures for High Voltage Applications
The aim of this work is to demonstrate high breakdown voltage and low buffer trapping in superlattice GaN-on-Silicon heterostructures for high voltage applications. To this aim, we compared two structures, one based on a step-graded (SG) buffer (reference structure), and another based on a superlattice (SL). In particular, we show that: (i) the use of an SL allows us to push the vertical breakdown voltage above 1500 V on a 5 µm stack, with a simultaneous decrease in vertical leakage current, as compared to the reference GaN-based epi-structure using a thicker buffer thickness. This is ascribed to the better strain relaxation, as confirmed by X-Ray Diffraction data, and to a lower clustering of dislocations, as confirmed by Defect Selective Etching and Cathodoluminescence mappings. (ii) SL-based samples have significantly lower buffer trapping, as confirmed by substrate ramp measurements. (iii) Backgating transient analysis indicated that traps are located below the two-dimensional electron gas, and are related to CN defects. (iv) The signature of these traps is significantly reduced on devices with SL. This can be explained by the lower vertical leakage (filling of acceptors via electron injection) or by the slightly lower incorporation of C in the SL buffer, due to the slower growth process. SL-based buffers therefore represent a viable solution for the fabrication of high voltage GaN transistors on silicon substrate, and for the simultaneous reduction of trapping processes.
Open AccessHigh Breakdown Voltage and Low Buffer Trapping in Superlattice GaN-on-Silicon Heterostructures for High Voltage Applications
The aim of this work is to demonstrate high breakdown voltage and low buffer trapping in superlattice GaN-on-Silicon heterostructures for high voltage applications. To this aim, we compared two structures, one based on a step-graded (SG) buffer (reference structure), and another based on a superlattice (SL). In particular, we show that: (i) the use of an SL allows us to push the vertical breakdown voltage above 1500 V on a 5 µm stack, with a simultaneous decrease in vertical leakage current, as compared to the reference GaN-based epi-structure using a thicker buffer thickness. This is ascribed to the better strain relaxation, as confirmed by X-Ray Diffraction data, and to a lower clustering of dislocations, as confirmed by Defect Selective Etching and Cathodoluminescence mappings. (ii) SL-based samples have significantly lower buffer trapping, as confirmed by substrate ramp measurements. (iii) Backgating transient analysis indicated that traps are located below the two-dimensional electron gas, and are related to CN defects. (iv) The signature of these traps is significantly reduced on devices with SL. This can be explained by the lower vertical leakage (filling of acceptors via electron injection) or by the slightly lower incorporation of C in the SL buffer, due to the slower growth process. SL-based buffers therefore represent a viable solution for the fabrication of high voltage GaN transistors on silicon substrate, and for the simultaneous reduction of trapping processes.
- Open Access
- 17 January 2020
- Published by MDPI AG in Micromachines
- Vol. 11 (1) , 101
Vertical Leakage in GaN-on-Si Stacks Investigated by a Buffer Decomposition Experiment
We investigated the origin of vertical leakage and breakdown in GaN-on-Si epitaxial structures. In order to understand the role of the nucleation layer, AlGaN buffer, and C-doped GaN, we designed a sequential growth experiment. Specifically, we analyzed three different structures grown on silicon substrates: AlN/Si, AlGaN/AlN/Si, C:GaN/AlGaN/AlN/Si. The results demonstrate that: (i) the AlN layer grown on silicon has a breakdown field of 3.25 MV/cm, which further decreases with temperature. This value is much lower than that of highly-crystalline AlN, and the difference can be ascribed to the high density of vertical leakage paths like V-pits or threading dislocations. (ii) the AlN/Si structures show negative charge trapping, due to the injection of electrons from silicon to deep traps in AlN. (iii) adding AlGaN on top of AlN significantly reduces the defect density, thus resulting in a more uniform sample-to-sample leakage. (iv) a substantial increase in breakdown voltage is obtained only in the C:GaN/AlGaN/AlN/Si structure, that allows it to reach VBD > 800 V. (v) remarkably, during a vertical I–V sweep, the C:GaN/AlGaN/AlN/Si stack shows evidence for positive charge trapping. Holes from C:GaN are trapped at the GaN/AlGaN interface, thus bringing a positive charge storage in the buffer. For the first time, the results summarized in this paper clarify the contribution of each buffer layer to vertical leakage and breakdown.
- 17 January 2020
- Published by MDPI AG in Micromachines
- Vol. 11 (1) , 101
Open AccessVertical Leakage in GaN-on-Si Stacks Investigated by a Buffer Decomposition Experiment
We investigated the origin of vertical leakage and breakdown in GaN-on-Si epitaxial structures. In order to understand the role of the nucleation layer, AlGaN buffer, and C-doped GaN, we designed a sequential growth experiment. Specifically, we analyzed three different structures grown on silicon substrates: AlN/Si, AlGaN/AlN/Si, C:GaN/AlGaN/AlN/Si. The results demonstrate that: (i) the AlN layer grown on silicon has a breakdown field of 3.25 MV/cm, which further decreases with temperature. This value is much lower than that of highly-crystalline AlN, and the difference can be ascribed to the high density of vertical leakage paths like V-pits or threading dislocations. (ii) the AlN/Si structures show negative charge trapping, due to the injection of electrons from silicon to deep traps in AlN. (iii) adding AlGaN on top of AlN significantly reduces the defect density, thus resulting in a more uniform sample-to-sample leakage. (iv) a substantial increase in breakdown voltage is obtained only in the C:GaN/AlGaN/AlN/Si structure, that allows it to reach VBD > 800 V. (v) remarkably, during a vertical I–V sweep, the C:GaN/AlGaN/AlN/Si stack shows evidence for positive charge trapping. Holes from C:GaN are trapped at the GaN/AlGaN interface, thus bringing a positive charge storage in the buffer. For the first time, the results summarized in this paper clarify the contribution of each buffer layer to vertical leakage and breakdown.