Jun-Bae Lee
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Jun-Bae Lee has a total of 1 co-authors. Here are the top co-authors by number of shared publications:
Dong-Seok Hyun
Fellow, IEEE, Dept. of Electrical Engineering, Hanyang University, 133-791, Haengdang-dong, Sungdong-Gu, Seoul, Korea
1 shared publication
Latest Publications
- 1 January 2007
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 02759306,p. 1913-1917
Gate Voltage Pattern Analyze for Short-Circuit Protection in IGBT Inverters
For the motor drive applications, short circuit protection is necessary to guarantee safety of all motor drive systems. This paper presents a new scheme for short circuit protection of IGBT by the gate voltage pattern analyzer (GVPA), which operates under the fault conditions such as hard switching fault (HSF) and fault under load (FUL). It has some functions such as short circuit detection through pattern recognition of IGBT gate voltage, gate voltage clamping for the reduction of short circuit current and soft off for the reduction of surge voltage. Moreover, it can be used to be integrated as one gate drive integrated circuit (IC) or high voltage integrated circuit (HVIC) because GVPA supplements logic and low voltage components. This paper provides simulated and actual experimental result of a new scheme under fault conditions.
- 1 January 2007
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 02759306,p. 1913-1917
Gate Voltage Pattern Analyze for Short-Circuit Protection in IGBT Inverters
For the motor drive applications, short circuit protection is necessary to guarantee safety of all motor drive systems. This paper presents a new scheme for short circuit protection of IGBT by the gate voltage pattern analyzer (GVPA), which operates under the fault conditions such as hard switching fault (HSF) and fault under load (FUL). It has some functions such as short circuit detection through pattern recognition of IGBT gate voltage, gate voltage clamping for the reduction of short circuit current and soft off for the reduction of surge voltage. Moreover, it can be used to be integrated as one gate drive integrated circuit (IC) or high voltage integrated circuit (HVIC) because GVPA supplements logic and low voltage components. This paper provides simulated and actual experimental result of a new scheme under fault conditions.