Yuxing Dai

SiC MOSFETs require ultra-fast short-circuit (SC) protection because of their limited SC withstand time. However, most existing indirect SC detection methods rely on instantaneous electrical quantities and are therefore vulnerable to switching noise. This letter proposes a unified SC protection method based on Kelvin-source disturbance charge integration. By rectifying and integrating the disturbance current coupled into the Kelvin-source path, the proposed method suppresses short switching spikes while preserving sensitivity to sustained SC disturbances. Thus, both hard-switching fault (HSF) and fault under load (FUL) can be identified using the same detection variable and the same threshold-based criterion. Experimental results demonstrate detection times of 90-96 ns and total protection times of 400-407 ns, without additional power-loop sensors and with strong potential for compact gate-driver integration.

Optical fiber surface-enhanced Raman spectroscopy (SERS) probes offer a rapid and highly sensitive approach of pharmaceuticals from environmental sources. SERS hot spots are recognized to occur when two noble nanoparticles are brought close enough to each other. However, controlling the gap size between nanoparticles on the fiber end faces at the nanoscale remains a great challenge without expensive and bulky instruments. Here, we report a precisely and simply regulated method that employs laser-controlled capture of Polyvinylpyrrolidone-shaped silver particles to generate silver clusters with nanoscale dimensions and gaps on the fiber end faces. The produced SERS probes can detect Rhodamine B solutions down to concentrations of 10⁻¹⁴ M, exhibiting excellent detection sensitivity and well reproducibility. The outstanding performance of these fiber SERS probes enables label-free monitoring of low concentrations at 0.01 μg/mL of antibiotics in deionized water, and 0.1 μg/mL of antibiotics in tap water and river water without complex pretreatment processes. The laser-induced SERS probe boasts rapid response, highly specific recognition, and cost-effective operation in the realm of environmental monitoring, offering an innovative solution for the efficient screening of trace antibiotic contamination.

Resonant switched-capacitor circuits are attractive for power integration, but encounter limited voltage regulation range and efficiency. This article proposes a family of quasi-parallel dc–dc converter with three-port resonant switched-capacitor circuit (TR-RSCC). The technique of partial power processing is deployed by merging the unregulated TP-RSCC with a wide-range voltage regulator, featuring efficient wide-range voltage regulation. The modularity and reconfigurability of transformerless TP-RSCC are analyzed to optimize the distribution of power flow and improve efficiency. Due to the soft-switching of all switches, the converter may operate at high frequency for high power density. The proposed quasi-parallel dc–dc converters with two types of voltage regulators are introduced as examples. In addition, the extension of a multiport circuit for bidirectional power flow and the control scheme are introduced. The 48–6 V experimental prototypes were built to verify the feasibility of the proposed two types of quasi-parallel dc–dc converters.

The SiC-based dual bridge paralleled (DBP) LLC resonant converter offers advantages of low current stress and high efficiency but suffers from high costs. In this article, a cost-effective hybrid Si/SiC DBP LLC resonant converter is proposed, which consists of a high-current low-cost Si IGBTs bridge arm and a low-current SiC MOSFETs bridge arm, obtaining significant cost-reduction. Benefiting the soft-switching operation of the Si IGBTs bridge arm, the proposed hybrid Si/SiC DBP LLC converter can achieve comparable switching losses with full-SiC MOSFETs design. Meanwhile, fewer resonant tanks are required benefiting from the topology reconstruction of the proposed converter, in comparison to the prior-art design of DBP LLC resonant converter, further reducing costs and power loss. A 6-kW prototype of the hybrid DBP LLC resonant converter, utilizing both Si IGBTs and SiC MOSFETs, is constructed as a case study to validate the proposed approach. Compared to the prior art full-SiC DBP LLC converter, the proposed hybrid Si/SiC LLC converter achieves comparable total power loss under high output power, while offering 51.7% switching device cost, 22.9% resonant components cost, and 31.6% total cost reductions.

Electro-aerodynamic propulsion high voltage power supply (EADP-HVPS) is designed to be lightweight by increasing the operating frequency and optimizing the selection of components based on engineering experience, which makes it difficult to guarantee the optimal lightweight design. This paper analyzes and proves that the relationship between the total weight and frequency of HVPS is not monotonically decreasing. This paper first derives the weight-frequency relationship of the heat dissipation materials of each part of the HVPS. Then, the weight-frequency relationship of the HVPS is obtained by mathematically fitting the three central weight-frequency relationships, and the design method is given for selecting the optimal frequency point for lightweight HVPS. Finally, an experimental prototype with 140 V input, 40 kV, and 619 W output prototype was designed according to the given method. It works at the optimal frequency point of 101.2 kHz, the weight is 423.9 g, and the specific power is 1.46 kW/kg. Both simulation and experiment verify the proposed theory.

Harmonic reducers (HR), as precision components in industrial robots, are susceptible to failure in complex working conditions. The current intelligent diagnosis methods for HR are limited and lack sufficient fault data to train deep learning models effectively. This paper presents a novel few-shot learning (FSL) fault diagnosis model named transformer convolution integration feature metric network (TCIFMN) which is based on metric learning (ML) and combines the advantages of convolutional neural networks (CNN) module and Transformer architecture. The transformer convolution integration module enhances the capability of extracting fault information and provides an input pair for feature metric network which calculates similarity scores based on the idea of the relation network. Additionally, to enhance the fault features of HR, the continuous wavelet transform (CWT) is employed to turn the fault signal into images in this paper. CWT can represent the fault information in the time domain and the frequency domain. The experimental results demonstrate that even with extremely limited training data, TCIFMN achieves prominent performance with 93% accuracy under complex working conditions, surpassing other comparative models.

A dc modeling method for resonant switched-capacitor converters (RSCCs) is proposed to figure out the best possible limits of converter efficiency with respect to regulation methods. The existing single-parameter dc model is extended to a load-dependent multiparameter dc model for power loss estimation of wide-range regulated RSCCs. For instance, four regulation methods and their corresponding modulation maps are studied to find the optimal operation range for efficient and wide-range voltage regulation. In addition, an implementation of GaN field-effect transistor (FET) synchronous rectification is presented to replace the diode in RSCC while the switching loss is incorporated into the dc model. Furthermore, an optimal design method is presented to maximize the regulation efficiency within the load range. A 300-W prototype was built to verify the feasibility of the proposed dc model. The proposed load-dependent multiparameter dc model demonstrates accurate voltage conversion ratio and power loss estimation.

Fast and reliable protection against short-circuit (SC) faults is critically important for the reliable operation of power devices. In this letter, an ultrafast and universal short-circuit protection (SCP) method is proposed for silicon carbide metal–oxide–semiconductor field-effect transistors based on gate current detection. This method exploits the characteristic of the gate current to become negative during SC faults and constant positive during normal operation. The proposed gate current detection approach swiftly identifies faults during the SC process, ensuring rapid response time. In addition, this method boasts broad applicability, being effective for both hard switching faults (HSFs) and faults under loads (FULs), and no extra auxiliary design is required for the three-pin device. The efficacy of the proposed SCP technique is validated through the testing of the SCP circuit. Experimental results demonstrate that the proposed circuit is applicable to both HSFs and FULs, with response delays of 69 ns for HSFs and 50 ns for FULs, and total protection trigger time of 383 ns for HSFs and 352 ns for FULs.