Leiyi Wang

This paper proposes a fast transient load response capacitor-less low-dropout regulator (CL-LDO) for digital analog hybrid circuits in the 180 nm process, capable of converting input voltages from 1.2 V to 1.8 V into an output voltage of 1 V. The design incorporates a rail-to-rail input and push–pull output (RIPO) amplifier to enhance the gain while satisfying the requirement for low power consumption. A super source follower buffer (SSFB) with internal stability is introduced to ensure loop stability. The proposed structure ensures the steady-state performance of the LDO without an on-chip capacitor. The auxiliary circuit, or transient enhancement circuit, does not compromise the steady-state stability and effectively enhances the transient performance during sudden load current steps. The proposed LDO consumes a quiescent current of 47 µA and achieves 25 µV/mA load regulation with a load current ranging from 0 to 20 mA. The simulation results demonstrate that a settling time of 0.2 µs is achieved for load steps ranging from 0 mA to 20 mA, while a settling time of 0.5 µs is attained for load steps ranging from 20 mA to 0 mA, with an edge time of 0.1 µs.

This paper proposed a fully integrated adaptive on-time (AOT) controlled buck converter with fast load transient. An adaptive on-time generator is presented to stabilize the output frequency. To enhance the light load efficiency, the converter could transfer from the pulse width modulation (PWM) to pulse skip modulation (PSM) as the load current decreases. The buck converter can switch between these two modulation modes adaptively with the assistance of a zero current detection circuit. Implemented in the TSMC 0.18 µm BCD (BiCMOS/DMOS) process, the proposed buck converter works with an input voltage ranging from 5.5 to 15 V, an output voltage ranging from 0.5 to 5 V, and an output load ranging up to 5 A. The experimental results show that based on the dual modulation adaptive on-time controlled mode, the transient recovery time from light to heavy load and from heavy load to light load is 13 µs and 15 µs, respectively. An overshot voltage of 57 mV and an undershot voltage of 53 mV are also achieved.