Jiali Cheng

This paper presents a complete modeling flow for GaN Schottky barrier diodes (SBDs), encompassing parasitic parameter de-embedding, small-signal equivalent circuit extraction, and DC characteristic analysis. The open/short de-embedding method is adopted to extract the parasitic parameters of the Ground–Signal–Ground (GSG) pads. A bias-partitioning strategy is employed to extract the intrinsic small-signal parameters, and the depletion capacitance model is used to physically fit the C-V characteristics. The forward Direct Current (DC) conduction current is described by the thermionic emission model, while the reverse leakage is modeled using a piecewise approach: the Poole–Frenkel (PF) trap-assisted emission model is applied in the low-bias region, and a double-exponential decay empirical model is introduced in the high-bias region, achieving high-precision fitting over the full bias range (−100 V~3 V). More importantly, this paper identifies a significant discrepancy between the series resistance extracted from DC measurements and that from Radio Frequency (RF) measurements, and attributes it to the frequency dispersion effect induced by trap states. The study demonstrates that combining DC and high-frequency characterization not only enables the construction of an accurate modeling framework, but also reveals the trap-related physical mechanisms within the device.

To accurately model the nonlinear characteristics of the intrinsic capacitance of Gallium Nitride High Electron Mobility Transistors (GaN HEMTs), this paper proposes an improved nonlinear capacitance model based on the traditional Angelov model. The experiments employed GaN HEMTs fabricated by United Monolithic Semiconductors (UMS) using the GH15-10 process. These devices feature a uniform gate length of 150 nm, with gate widths designed as 2 × 10 μm, 4 × 20 μm, 6 × 30 μm, and 8 × 40 μm, respectively (gate width is calculated as “number of gate fingers × unit gate width”). In this study, two types of devices with gate widths of 2 × 10 μm and 4 × 20 μm were selected to extract intrinsic capacitance parameters, which were then substituted into the traditional Angelov model and the proposed improved model, respectively. By comparing the coefficient of determination (R²) and Root Mean Square Error (RMSE) of the two models, it is found that the improved model has a significantly higher degree of agreement with the experimental measurement dates and is more suitable for the quantitative characterization of the nonlinear capacitance characteristics of GaN HEMTs. This research provides support for the accurate application of device models in the design of high-frequency circuits in subsequent studies.

An improved small‐signal model applied to GaN‐based devices is presented in this article. The extrinsic elements of the equivalent circuit topology are extracted using the test structures and the cut‐off method. In order to obtain a good agreement between model simulations and measurements, distributed capacitive effects are taken into account. In addition, an inductance L_ds is introduced based on the conventional intrinsic equivalent circuit topology. Good agreement between the modeled and measured S‐parameters is obtained for GaN HEMTs with a gate width of 2 × 100 μm (number of gate fingers × unit gate width) in the frequency range of 0.5–40 GHz.

In this article, an improved nonlinear model for gallium nitride high‐electron‐mobility transistors (GaN HEMTs) is proposed. Aiming at the problem of insufficient accuracy of the nonlinear DC model caused by the self‐heating effect and trap effect in the traditional model, this thesis uses the Softplus function to improve the traditional nonlinear DC model and establishes a nonlinear DC model including the self‐heating effect, which is verified by the three GaN HEMT devices of different sizes. The MSE of I_ds is less than 2.44 × 10⁻⁶. The traditional empirical basis model needs to calculate the partial derivative of the current expression with respect to V_ds, which is tedious and complicated. The proposed model can be directly used to fit the G_m. The verification results show that the MSE of the G_m is less than 1.07 × 10⁻⁴, which proves the effectiveness of the equation.

An improved method of extracting small-signal equivalent circuit model parameters for gallium nitride high electron mobility transistors (GaN HEMTs) is presented. This paper intends to present a method to extract the parasitic inductance and resistance of transistors based on the short-test structure without the open-circuit test structure. The parasitic capacitance of transistors is extracted by the method based on the size scalable model. Compared with the traditional COLD-FET method, the extraction procedure is simpler and more convenient. After removing the influence of parasitic elements, the intrinsic parameters of the model can be extracted by the S-parameters measured at different bias points. The experimental results show that the simulation results have good agreement with the measured results in the range of 0.5110GHz.