Jiebin Gu
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Research Interests
Jiebin Gu has a total of 20 co-authors. Here are the top co-authors by number of shared publications:
- Xinxin Li
State Key Laboratory of Transducer Technology, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China
8 shared publications - Changnan Chen
State Key Laboratory of Transducer Technology, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai, China
6 shared publications - Pichao Pan
State Key Laboratory of Transducer Technology, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai, China
5 shared publications - Min Liu
State Key Laboratory of Transducer Technology, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai, China
3 shared publications - Nianying Wang
State Key Laboratory of Transducer Technology, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China
2 shared publications - Ruofeng Han
State Key Laboratory of Transducer Technology, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China
2 shared publications
Latest Publications
- 1 April 2024
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 71 (5) , 3169-3174
High-Performance 3-D Silicon-Embedded Coupled Solenoid Inductors With Inserted Magnetic Core
In order to realize high performance and miniaturized integrated voltage regulators (IVRs), the study of ON-chip passive components, especially coupled inductors is necessary. Silicon-embedded coupled three-dimensional solenoidal inductors with 10-turn and 15-turn interleaved windings are designed and batch fabricated in series using micro-electro-mechanical systems (MEMS) and a novel Zn-Al alloy micro-casting technique (MCT) process. The coupled inductors developed in this study incorporating an embedded $200~\mu \text{m}$ -thick ferrite magnetic core, exhibit superior inductance integration densities of 56.7 nH/mm2, and ultrahigh coupling coefficients over 0.96 at lower frequencies of around 10 MHz. Besides, the maximum efficiencies of both 10-turn and 15-turn coupled inductors reach 93.23% and 91%, respectively. These results demonstrate significant performance improvements over the corresponding air-core coupled inductors. In addition, both designs exhibit high current carrying capacity with a measured saturation current over 2.2 A when operating in an inversely coupled mode. The superior performance of proposed coupled inductors is beneficial to the design and application of IVRs.
- 1 April 2024
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 71 (5) , 3169-3174
High-Performance 3-D Silicon-Embedded Coupled Solenoid Inductors With Inserted Magnetic Core
In order to realize high performance and miniaturized integrated voltage regulators (IVRs), the study of ON-chip passive components, especially coupled inductors is necessary. Silicon-embedded coupled three-dimensional solenoidal inductors with 10-turn and 15-turn interleaved windings are designed and batch fabricated in series using micro-electro-mechanical systems (MEMS) and a novel Zn-Al alloy micro-casting technique (MCT) process. The coupled inductors developed in this study incorporating an embedded $200~\mu \text{m}$ -thick ferrite magnetic core, exhibit superior inductance integration densities of 56.7 nH/mm2, and ultrahigh coupling coefficients over 0.96 at lower frequencies of around 10 MHz. Besides, the maximum efficiencies of both 10-turn and 15-turn coupled inductors reach 93.23% and 91%, respectively. These results demonstrate significant performance improvements over the corresponding air-core coupled inductors. In addition, both designs exhibit high current carrying capacity with a measured saturation current over 2.2 A when operating in an inversely coupled mode. The superior performance of proposed coupled inductors is beneficial to the design and application of IVRs.
- Open Access
- 31 January 2024
- Published by MDPI AG in Micromachines
- Vol. 15 (2) , 228
A High-Voltage-Isolated MEMS Quad–Solenoid Transformer with Specific Insulation Barriers for Miniaturized Galvanically Isolated Power Applications
The paper reports on high voltage (HV)-isolated MEMS quad–solenoid transformers for compact isolated gate drivers and bias power supplies. The component is wafer-level fabricated via a novel MEMS micro-casting technique, where the tightly coupled quad–solenoid chip consists of monolithically integrated 3D inductive coils and an inserted ferrite magnetic core for high-efficiency isolated power transmission through electromagnetic coupling. The proposed HV-isolated transformer demonstrates a high inductance value of 743.2 nH, along with a small DC resistance of only 0.39 Ω in a compact footprint of 6 mm2, making it achieve a very high inductance integration density (123.9 nH/mm2) and the ratio of L/R (1906 nH/Ω). More importantly, with embedded ultra-thick serpentine-shaped (S-shaped) SiO2 isolation barriers that completely separate the primary and secondary windings, an over 2 kV breakdown voltage is obtained. In addition, the HV-isolated transformer chips exhibit a superior power transfer efficiency of over 80% and ultra-high dual-phase saturation current of 1.4 A, thereby covering most practical cases in isolated, integrated bias power supplies such as high-efficiency high-voltage-isolated gate driver solutions.
- 31 January 2024
- Published by MDPI AG in Micromachines
- Vol. 15 (2) , 228
Open AccessA High-Voltage-Isolated MEMS Quad–Solenoid Transformer with Specific Insulation Barriers for Miniaturized Galvanically Isolated Power Applications
The paper reports on high voltage (HV)-isolated MEMS quad–solenoid transformers for compact isolated gate drivers and bias power supplies. The component is wafer-level fabricated via a novel MEMS micro-casting technique, where the tightly coupled quad–solenoid chip consists of monolithically integrated 3D inductive coils and an inserted ferrite magnetic core for high-efficiency isolated power transmission through electromagnetic coupling. The proposed HV-isolated transformer demonstrates a high inductance value of 743.2 nH, along with a small DC resistance of only 0.39 Ω in a compact footprint of 6 mm2, making it achieve a very high inductance integration density (123.9 nH/mm2) and the ratio of L/R (1906 nH/Ω). More importantly, with embedded ultra-thick serpentine-shaped (S-shaped) SiO2 isolation barriers that completely separate the primary and secondary windings, an over 2 kV breakdown voltage is obtained. In addition, the HV-isolated transformer chips exhibit a superior power transfer efficiency of over 80% and ultra-high dual-phase saturation current of 1.4 A, thereby covering most practical cases in isolated, integrated bias power supplies such as high-efficiency high-voltage-isolated gate driver solutions.
- 17 January 2024
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Power Electronics
- Vol. 39 (4) , 4503-4512
Design and Wafer-Level Fabrication of Stacked-Type Transformers for High-Density Power Converters
In response to the emerging demands in the miniaturization and integration of power conversion systems, the stacked-type transformer chips with significantly improved power efficiency for sub-MHz applications are developed in this article. The silicon-embedded high-density multilayer spiral winding structures in the transformer chips are fully metalized using our group developed Zn--Al alloy microelectromechanical system casting technique, which ensures the wafer-level batch fabrication with high consistency. After being assembled with dual E-shape magnetic cores, the fabricated stacked-type transformer chips are measured to demonstrate high inductance integration density of over 1.54 μH/mm 2 and superior coupling coefficient of 0.985 at the targeted operating frequency of 100 kHz. Owing to the compact, low-resistance thick-metal structures, Q -factors of 20.5 at 100 kHz and transformer efficiency of above 85% in a wide frequency range are obtained from the two-port small signal measurements. Switching mode fly-back dc–dc converters are constructed to further validate the power conversion capability of the developed device. Benefiting from the implementation of the stacked-type transformers, the isolated dc–dc converters are measured to operate with an overall power efficiency of up to 82.46% at the 7.5 W power output condition, where an ultra-high power density of 17.64 W/cm 3 is also obtained.
- 17 January 2024
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Power Electronics
- Vol. 39 (4) , 4503-4512
Design and Wafer-Level Fabrication of Stacked-Type Transformers for High-Density Power Converters
In response to the emerging demands in the miniaturization and integration of power conversion systems, the stacked-type transformer chips with significantly improved power efficiency for sub-MHz applications are developed in this article. The silicon-embedded high-density multilayer spiral winding structures in the transformer chips are fully metalized using our group developed Zn--Al alloy microelectromechanical system casting technique, which ensures the wafer-level batch fabrication with high consistency. After being assembled with dual E-shape magnetic cores, the fabricated stacked-type transformer chips are measured to demonstrate high inductance integration density of over 1.54 μH/mm 2 and superior coupling coefficient of 0.985 at the targeted operating frequency of 100 kHz. Owing to the compact, low-resistance thick-metal structures, Q -factors of 20.5 at 100 kHz and transformer efficiency of above 85% in a wide frequency range are obtained from the two-port small signal measurements. Switching mode fly-back dc–dc converters are constructed to further validate the power conversion capability of the developed device. Benefiting from the implementation of the stacked-type transformers, the isolated dc–dc converters are measured to operate with an overall power efficiency of up to 82.46% at the 7.5 W power output condition, where an ultra-high power density of 17.64 W/cm 3 is also obtained.
- Open Access
- 5 July 2022
- Published by MDPI AG in Micromachines
- Vol. 13 (7) , 1071
A High-Performance MEMS Accelerometer with an Improved TGV Process of Low Cost
High-performance MEMS accelerometers usually use a pendulum structure with a larger mass. Although the performance of the device is guaranteed, the manufacturing cost is high. This paper proposes a method of fabricating high-performance MEMS accelerometers with a TGV process, which can reduce the manufacturing cost and ensure the low-noise characteristics of the device. The TGV processing relies on laser drilling, the metal filling in the hole is based on the casting mold and CMP, and the packaging adopts the three-layer anodic bonding process. Moreover, for the first time, the casting mold process is introduced to the preparation of MEMS devices. In terms of structural design, the stopper uses distributed comb electrodes for overload displacement suppression, and the gas released by the packaging method provides excellent mechanical damping characteristics. The prepared accelerometer has an anti-overload capability of 10,000 g, the noise density is less than 0.001°/√Hz, and it has ultra-high performance in tilt measurement.
- 5 July 2022
- Published by MDPI AG in Micromachines
- Vol. 13 (7) , 1071
Open AccessA High-Performance MEMS Accelerometer with an Improved TGV Process of Low Cost
High-performance MEMS accelerometers usually use a pendulum structure with a larger mass. Although the performance of the device is guaranteed, the manufacturing cost is high. This paper proposes a method of fabricating high-performance MEMS accelerometers with a TGV process, which can reduce the manufacturing cost and ensure the low-noise characteristics of the device. The TGV processing relies on laser drilling, the metal filling in the hole is based on the casting mold and CMP, and the packaging adopts the three-layer anodic bonding process. Moreover, for the first time, the casting mold process is introduced to the preparation of MEMS devices. In terms of structural design, the stopper uses distributed comb electrodes for overload displacement suppression, and the gas released by the packaging method provides excellent mechanical damping characteristics. The prepared accelerometer has an anti-overload capability of 10,000 g, the noise density is less than 0.001°/√Hz, and it has ultra-high performance in tilt measurement.
- Open Access
- 18 February 2022
- Published by MDPI AG in Micromachines
- Vol. 13 (2) , 325
MEMS-Casting Fabricated Chip-Style 3D Metal Solenoidal Transformers towards Integrated Power Supply
A silicon-chip-based 3D metal solenoidal transformer is proposed and developed to achieve AC-DC conversion for integrated power supply applications. With wafer-level micro electromechanical systems (MEMS) fabrication technique to form the metal casting mold and the following micro-casting technique to rapidly (within 6 min) fill molten ZnAl alloy into the pre-micromachined silicon mold, 45-turns primary solenoid and 7-turns secondary solenoid are fabricated in silicon wafers, where the two intertwining solenoids are located at inner deck and outer deck, respectively. Permalloy soft magnetic core is inserted into a pre-etched channel in the silicon chip, which is surrounded by the solenoids. The size of the chip-style transformer is as small as 8.5 mm × 6.6 mm × 2.5 mm. The internal resistance of the primary solenoid is 1.82 Ω and that of the secondary solenoid is 0.16 Ω. The working frequency of the transformer is 60 kHz. Combined with the testing circuit of the switch mode power supply, the DC voltage of 13.02 V is obtained when the input is 110 V at 50 Hz/60 Hz. Furthermore, the on-chip 3D solenoidal transformer is used for lighting four LEDs, which shows great potential for AC-DC power supply. The wafer-level fabricated chip-style solenoidal AC-DC transformer for integrated power supply is advantageous in uniform fabrication, small size and volume applications.
- 18 February 2022
- Published by MDPI AG in Micromachines
- Vol. 13 (2) , 325
Open AccessMEMS-Casting Fabricated Chip-Style 3D Metal Solenoidal Transformers towards Integrated Power Supply
A silicon-chip-based 3D metal solenoidal transformer is proposed and developed to achieve AC-DC conversion for integrated power supply applications. With wafer-level micro electromechanical systems (MEMS) fabrication technique to form the metal casting mold and the following micro-casting technique to rapidly (within 6 min) fill molten ZnAl alloy into the pre-micromachined silicon mold, 45-turns primary solenoid and 7-turns secondary solenoid are fabricated in silicon wafers, where the two intertwining solenoids are located at inner deck and outer deck, respectively. Permalloy soft magnetic core is inserted into a pre-etched channel in the silicon chip, which is surrounded by the solenoids. The size of the chip-style transformer is as small as 8.5 mm × 6.6 mm × 2.5 mm. The internal resistance of the primary solenoid is 1.82 Ω and that of the secondary solenoid is 0.16 Ω. The working frequency of the transformer is 60 kHz. Combined with the testing circuit of the switch mode power supply, the DC voltage of 13.02 V is obtained when the input is 110 V at 50 Hz/60 Hz. Furthermore, the on-chip 3D solenoidal transformer is used for lighting four LEDs, which shows great potential for AC-DC power supply. The wafer-level fabricated chip-style solenoidal AC-DC transformer for integrated power supply is advantageous in uniform fabrication, small size and volume applications.
- 9 January 2022
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 200-203
Wafer-Level Fabricated Double-Helix Rf-Mems Transformers with Coupling-Factor of 0.93@100Mhz For High-Efficiency Isolated Power/Signal Transmission
This paper presents silicon-chip-based 3D embedded double-helix RF transformers (EDHTs) that are wafer-level micromachined using the rapid molten-alloy MEMS-casting technique. With tightly coupled metal double-helix structure and ZnAl-alloy MEMS-casting process in silicon wafers, one EDHT with the tiny footprint of 1mm*2mm can be fabricated in batches. Isolation is achieved by the silicon dioxide layer formed by thermal oxidation between the coils. The EDHT is showing low enough DC resistance (0.8Ω) and 121.4nH inductance value which is several times higher inductance integration density than those planar spiral devices and measured to exhibit ultra-high coupling-factor (>0.90) and maximum transformer efficiency (>81%) in the wide frequency range of 30MHz~200MHz, being proved to significantly improve the efficiency and the integration-density in isolated power/signal transmission applications.
- 9 January 2022
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 200-203
Wafer-Level Fabricated Double-Helix Rf-Mems Transformers with Coupling-Factor of 0.93@100Mhz For High-Efficiency Isolated Power/Signal Transmission
This paper presents silicon-chip-based 3D embedded double-helix RF transformers (EDHTs) that are wafer-level micromachined using the rapid molten-alloy MEMS-casting technique. With tightly coupled metal double-helix structure and ZnAl-alloy MEMS-casting process in silicon wafers, one EDHT with the tiny footprint of 1mm*2mm can be fabricated in batches. Isolation is achieved by the silicon dioxide layer formed by thermal oxidation between the coils. The EDHT is showing low enough DC resistance (0.8Ω) and 121.4nH inductance value which is several times higher inductance integration density than those planar spiral devices and measured to exhibit ultra-high coupling-factor (>0.90) and maximum transformer efficiency (>81%) in the wide frequency range of 30MHz~200MHz, being proved to significantly improve the efficiency and the integration-density in isolated power/signal transmission applications.
- Open Access
- 12 January 2021
- Published by MDPI AG in Micromachines
- Vol. 12 (1) , 74
Double-Deck Metal Solenoids 3D Integrated in Silicon Wafer for Kinetic Energy Harvester
A silicon-chip based double-deck three-dimensional (3D) solenoidal electromagnetic (EM) kinetic energy harvester is developed to convert low-frequency (<100 Hz) vibrational energy into electricity with high efficiency. With wafer-level micro electro mechanical systems (MEMS) fabrication to form a metal casting mold and the following casting technique to rapidly (within minutes) fill molten ZnAl alloy into the pre-micromachined silicon mold, the 300-turn solenoid coils (150 turns for either inner solenoid or outer solenoid) are fabricated in silicon wafers for saw dicing into chips. A cylindrical permanent magnet is inserted into a pre-etched channel for sliding upon external vibration, which is surrounded by the solenoids. The size of the harvester chip is as small as 10.58 mm × 2.06 mm × 2.55 mm. The internal resistance of the solenoids is about 17.9 Ω. The maximum peak-to-peak voltage and average power output are measured as 120.4 mV and 43.7 . The EM energy harvester shows great improvement in power density, which is 786 and the normalized power density is 98.3 . The EM energy harvester is verified by experiment to be able to generate electricity through various human body movements of walking, running and jumping. The wafer-level fabricated chip-style solenoidal EM harvesters are advantageous in uniform performance, small size and volume applications.- 12 January 2021
- Published by MDPI AG in Micromachines
- Vol. 12 (1) , 74
Open AccessDouble-Deck Metal Solenoids 3D Integrated in Silicon Wafer for Kinetic Energy Harvester
A silicon-chip based double-deck three-dimensional (3D) solenoidal electromagnetic (EM) kinetic energy harvester is developed to convert low-frequency (<100 Hz) vibrational energy into electricity with high efficiency. With wafer-level micro electro mechanical systems (MEMS) fabrication to form a metal casting mold and the following casting technique to rapidly (within minutes) fill molten ZnAl alloy into the pre-micromachined silicon mold, the 300-turn solenoid coils (150 turns for either inner solenoid or outer solenoid) are fabricated in silicon wafers for saw dicing into chips. A cylindrical permanent magnet is inserted into a pre-etched channel for sliding upon external vibration, which is surrounded by the solenoids. The size of the harvester chip is as small as 10.58 mm × 2.06 mm × 2.55 mm. The internal resistance of the solenoids is about 17.9 Ω. The maximum peak-to-peak voltage and average power output are measured as 120.4 mV and 43.7 . The EM energy harvester shows great improvement in power density, which is 786 and the normalized power density is 98.3 . The EM energy harvester is verified by experiment to be able to generate electricity through various human body movements of walking, running and jumping. The wafer-level fabricated chip-style solenoidal EM harvesters are advantageous in uniform performance, small size and volume applications. - 10 June 2016
- Published by IOP Publishing in Journal of Micromechanics and Microengineering
- Vol. 26 (7) , 075009
Study of a through-silicon/substrate via filling method based on the combinative effect of capillary action and liquid bridge rupture
Through-silicon via (TSV) is increasing its importance in advanced device packaging. In this paper, a through-silicon/substrate via filling method based on the combinative effect of liquid bridge rupture and capillary action is proposed and demonstrated. The proposed method is able to achieve alloy vias from the surface of a molten alloy pool. Two different processes were tested in experiments and the results show that one of these processes is able to achieve fully filled vias. In addition, a piece of equipment was specially made for the proposed via filling method. The via filling method studied in this paper has a potential application for TSVs in MEMS packaging.
- 10 June 2016
- Published by IOP Publishing in Journal of Micromechanics and Microengineering
- Vol. 26 (7) , 075009
Study of a through-silicon/substrate via filling method based on the combinative effect of capillary action and liquid bridge rupture
Through-silicon via (TSV) is increasing its importance in advanced device packaging. In this paper, a through-silicon/substrate via filling method based on the combinative effect of liquid bridge rupture and capillary action is proposed and demonstrated. The proposed method is able to achieve alloy vias from the surface of a molten alloy pool. Two different processes were tested in experiments and the results show that one of these processes is able to achieve fully filled vias. In addition, a piece of equipment was specially made for the proposed via filling method. The via filling method studied in this paper has a potential application for TSVs in MEMS packaging.