Lei Wang
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Research Subjects
Research Interests
Lei Wang has a total of 29 co-authors. Here are the top co-authors by number of shared publications:
- Lingxiao Ma
Microsoft Research, Beijing, China
4 shared publications - Mao Yang
Microsoft Research, Beijing, China
4 shared publications - Ting Cao
Tsinghua University
3 shared publications - Fan Yang
Microsoft Research, Beijing, China
2 shared publications - Jianyu Wei
University of Science and Technology of China, Hefei, China
2 shared publications - Jilong Xue
Microsoft Research, Beijing, China
2 shared publications
Latest Publications
- Open Access
- 28 January 2026
- Published by Association for Computing Machinery (ACM)
- p. 635-647
MetaAttention: A Unified and Performant Attention Framework across Hardware Backends
- 28 January 2026
- Published by Association for Computing Machinery (ACM)
- p. 635-647
Open AccessMetaAttention: A Unified and Performant Attention Framework across Hardware Backends
- Top Cited PapersOpen Access
- 20 June 2025
- Published by Association for Computing Machinery (ACM)
- p. 514-528
LUT Tensor Core: A Software-Hardware Co-Design for LUT-Based Low-Bit LLM Inference
- 20 June 2025
- Published by Association for Computing Machinery (ACM)
- p. 514-528
Top Cited PapersOpen AccessLUT Tensor Core: A Software-Hardware Co-Design for LUT-Based Low-Bit LLM Inference
- Top Cited PapersOpen Access
- 30 March 2025
- Published by Association for Computing Machinery (ACM)
- p. 278-292
T-MAC: CPU Renaissance via Table Lookup for Low-Bit LLM Deployment on Edge
- 30 March 2025
- Published by Association for Computing Machinery (ACM)
- p. 278-292
Top Cited PapersOpen AccessT-MAC: CPU Renaissance via Table Lookup for Low-Bit LLM Deployment on Edge
- Open Access
- 27 April 2024
- Published by Association for Computing Machinery (ACM)
- p. 801-817
PrimePar: Efficient Spatial-temporal Tensor Partitioning for Large Transformer Model Training
- 27 April 2024
- Published by Association for Computing Machinery (ACM)
- p. 801-817
Open AccessPrimePar: Efficient Spatial-temporal Tensor Partitioning for Large Transformer Model Training
- Open Access
- 20 February 2024
- Published by Association for Computing Machinery (ACM)
- p. 333-347
ConvStencil: Transform Stencil Computation to Matrix Multiplication on Tensor Cores
Tensor Core Unit (TCU) is increasingly integrated into modern high-performance processors to enhance matrix multiplication performance. However, constrained to its over-specification, its potential for improving other critical scientific operations like stencil computations remains untapped. This paper presents ConvStencil1, a novel stencil computing system designed to efficiently transform stencil computation to matrix multiplication on Tensor Cores. We first develop a performance model for ConvStencil to guide algorithm design and optimization on TCUs. Based on this model, we propose three techniques: (1) Memory-efficient Layout Transformation using the stencil2row method; (2) Computation-dense Compute Adaptation with Dual Tessellation and kernel fusion; and (3) Performance-boosting Conflict Removal using a Lookup Table and Dirty Bits Padding. ConvStencil outperforms other stencil optimization frameworks, achieving significant speedups compared to solutions like AMOS, cuDNN, Brick, DRStencil, and TCStencil. By transforming stencil computation on Tensor Cores, ConvStencil promises to improve the performance of various scientific and engineering applications.
- 20 February 2024
- Published by Association for Computing Machinery (ACM)
- p. 333-347
Open AccessConvStencil: Transform Stencil Computation to Matrix Multiplication on Tensor Cores
Tensor Core Unit (TCU) is increasingly integrated into modern high-performance processors to enhance matrix multiplication performance. However, constrained to its over-specification, its potential for improving other critical scientific operations like stencil computations remains untapped. This paper presents ConvStencil1, a novel stencil computing system designed to efficiently transform stencil computation to matrix multiplication on Tensor Cores. We first develop a performance model for ConvStencil to guide algorithm design and optimization on TCUs. Based on this model, we propose three techniques: (1) Memory-efficient Layout Transformation using the stencil2row method; (2) Computation-dense Compute Adaptation with Dual Tessellation and kernel fusion; and (3) Performance-boosting Conflict Removal using a Lookup Table and Dirty Bits Padding. ConvStencil outperforms other stencil optimization frameworks, achieving significant speedups compared to solutions like AMOS, cuDNN, Brick, DRStencil, and TCStencil. By transforming stencil computation on Tensor Cores, ConvStencil promises to improve the performance of various scientific and engineering applications.