Zhen Sheng

As synchrotron radiation sources (SRSs) expand to cover a broader energy range, the demand for hybrid detectors with improved spatial and energy resolution is increasing. This paper presents the design and characterization of a prototype pixel readout ASIC featuring a small pixel size and low noise, developed for low energy soft X-ray applications. This chip adopts the single photon-counting (SPC) approach and each pixel consists of a front-end amplifier, a discriminator, a charge injection circuitry and a pair of 15-bit counters with associated logic. Fabricated in a 130 nm CMOS process, the chip integrates a 2 × 16 pixel matrix with a 50 µm ×50 µm pixel size. Measurement results indicate the maximum pixel equivalent noise charge (ENC) across the matrix is 20 e⁻rms without sensor attached. The results validate that the chip design has the potential to deliver a low-energy resolution for soft X-ray applications.

Programmable integrated photonic circuits are poised to drive a new revolution in information systems by synergizing with high‐speed digital signals. Central to this vision is the ability to reconfigure optical signal processing for multi‐functional photonic integration. Here, we design and experimentally demonstrate a thermo‐optically reconfigurable adiabatic coupler monolithically integrated on a silicon photonics platform. The device combines adiabatic directional couplers with titanium nitride (TiN) micro‐heaters embedded in the adiabatic transition region, enabling dynamic coupling ratio tuning via the localized thermo‐optic modulation. Experimental results confirm continuous coupling ratio adjustment from 50:50 to 70:30 across 80‐nm bandwidth (1,520–1,600 nm), with insertion loss kept below 0.25 dB. Leveraging its tunability, the device enables programmable spectral routing with free spectral ranges (FSR) of 20 nm and 40 nm. The proposed approach offers enhanced flexibility and scalability for high‐density photonic systems, providing a promising pathway toward next‐generation programmable photonic circuits and optical computing architectures.

An ultra-broadband and compact 3-dB power splitter has been designed and fabricated using an adiabatic rib silicon waveguide on the silicon-on-insulator (SOI) platform. This device primarily consists of two tapered rib waveguides to facilitate mode evolution for the transverse electric (TE) mode. The results demonstrate that the proposed device can achieve a 150 nm bandwidth in the wavelength range from 1450 nm to 1600 nm for 3-dB power splitting. In addition, the mode evolution footprint is significantly reduced to $78~\mu \text{m}$ with an excess loss of less than 0.18 dB. This proposed device offers a notable trade-off of device performance for power splitters. With multiple performance metrics, the rib waveguide-based adiabatic directional coupler exhibits significant potential for application in high-density photonic integrated chips (PICs).

Optimizing doping profiles has always been a key approach to enhance the performance of silicon modulators. Nevertheless, the pursuit of innovative profiles has encountered barriers in recent times. To tackle this issue, the idea of inverse design, widely adopted in passive photonic devices, can be employed in silicon active devices. As a result, we incorporate the inverse design method with the particle swarm optimization (PSO) algorithm and achieve a G-shaped doping profile for the modulator, exhibiting superior $V_{\pi } L$ of 0.68 V $\cdot$ cm and low loss of 9.3 dB/cm. The small-signal frequency response suggests a reliable operation range under reverse biases of 1 $\sim$ 3 V with the bandwidth over 26 GHz. The silicon modulator with a G-shaped design demonstrates remarkable efficiency in modulation and very low loss, suggesting its great potential for application in microwave front-end systems. The use of inverse design shows great potential in enhancing active silicon photonic devices, allowing for faster, higher-capacity, and more reliable data communication systems.

In silicon modulator design, implantation is always a key factor, significantly influencing the doping profile and carrier distribution. As waveguide doping is limited by the compact footprint of the modulator rib, three-dimensional complex optimization is a viable option to improve performance. This work proposes an X-intersected modulator based on two inversely slanted junctions using the effective 3D Monte Carlo method for junction generation. The optimized results show that the modulation efficiency of the design is 1.09 V·cm, while the loss is 18 dB/cm, and the 3 dB bandwidth reaches over 35 GHz owing to the decreased resistance and capacitance of the 3D junction. This work demonstrates the benefits of 3D doping design in silicon modulators, contributing to higher efficiency and avoiding additional PN overlap to introduce lower capacitance. The design of 3D doping profiles well balances the DC and AC performance, and provides novel modulator solutions for high-speed datacom.

An ultra-broadband, compact and CMOS-compatible arbitrary ratio power splitter that is based on a directional coupler is proposed on the silicon-on-insulator (SOI) platform. The proposed device consists of an adiabatic sub-wavelength grating (ASWG) and a conventional directional coupler. The wavelength dependence is greatly reduced by introducing an ASWG in the coupling region of the directional coupler. Simulation results show that our proposed device has an operating bandwidth of 250 nm for arbitrary power splitting ratios, with a transmission power variation of less than 8.5%, covering the wavelength range from 1400 nm to 1650 nm. Meanwhile, the device footprint has been narrowed to less than 46 μm. In addition, the power splitters also exhibit a low excess loss of below 0.24 dB. Our proposed ASWG-assisted power splitters show excellent potential for application in large-scale photonic integrated circuits.

Photonic antennas are critical in applications such as spectroscopy, photovoltaics, optical communications, holography, and sensors. Metal antennas are widely used because of their small size, but they are difficult to be compatible with a CMOS. All-dielectric antennas are easier to integrate with Si waveguides, but are generally larger in size. In this paper, we propose the design of a small-sized, high-efficiency semicircular dielectric grating antenna. The antenna’s key size is only 2.37 µ m × 4.74 µ m , and the emission efficiency reaches over 64% in the wavelength range from 1.16 to 1.61 µm. The antenna provides a new, to the best of our knowledge, approach for three-dimensional optical interconnections between different decks of integrated photonic circuits.

3D doping structure has significant advantages in modulation efficiency and loss compared with 2D modulator doping profiles. However, to the best of our knowledge, previous work on 3D simulation methods for interdigitated doping designs applied simplified models, which prohibited complex 3D doping. In this work, innovative omni junctions, based on the effective 3D Monte-Carlo method, are believed to be the first proposed for high-performance modulators. Simulation results show that the modulation efficiency reaches 0.88 V·cm, while the loss is only 16 dB/cm, with capacitance below 0.42 pF/mm. This work provides a modulator design with superior modulation efficiency and serviceability for high-speed datacom.

We experimentally demonstrate a low-loss and low-crosstalk 16-channel 200 GHz-channel-spacing arrayed waveguide grating router (AWGR) with a size of 0.67 × 0.37 mm ² , targeting for C-band wavelength division multiplexing (WDM) interconnect routing applications. As a result, the AWGR features a channel spacing of 200±10 GHz, a free spectral range of 25.62 nm and a 3 dB channel bandwidth of 0.9 nm. Based on comprehensive optimal design, the measured characterization revealed 5.55 dB maximum channel loss non-uniformity with 1.13 dB best-case channel insertion loss. Besides, the fabricated device exhibits good cyclic-frequency operation for all 16 × 16 port combinations with channel crosstalk of –15.11 dB.