Yiwei Zou
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Yiwei Zou has a total of 27 co-authors. Here are the top co-authors by number of shared publications:
- Kaiyuan Yang
Rice University
6 shared publications - Wei Wang
Department of Electrical and Computer Engineering, Rice University, Houston, TX, USA
5 shared publications - Huan-Cheng Liao
Department of Electrical and Computer Engineering, Rice University, Houston, TX, USA
4 shared publications - Jacob T. Robinson
Rice University
4 shared publications - Yumin Su
Department of Electrical and Computer Engineering, Rice University, Houston, TX, USA
4 shared publications - Joshua E. Woods
Department of Electrical and Computer Engineering, Rice University, Houston, TX, USA
3 shared publications
Latest Publications
- 7 November 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 61 (3) , 925-936
An Efficient Power Management Unit With Continuous MPPT and Energy Recycling for Wireless Millimetric Biomedical Implants
Biomedical implants offer transformative tools to improve medical outcomes. To realize minimally invasive implants with miniaturized volume and weight, wireless power transfer (WPT) has been extensively studied to replace bulky batteries that dominate the volume of traditional implants and require surgical replacements. Ultrasonic (US) and magnetoelectric (ME) WPT modalities, which leverage low-frequency acoustic–electrical coupling for energy transduction, become viable solutions for millimeter-scale receivers (RXs). This work presents a fully integrated power management unit (PMU) for ME WPT in millimetric implants. The PMU achieves load-independent maximum power extraction and usage by continuously matching the transducer’s impedance, dynamically optimizing the power stage across varying input/load conditions, and reusing the storage energy to sustain the system when input power drops. Its parallel-input regulation and storing stages architecture prevents the cascading power loss. With the skewed-duty-cycle maximum power point tracking (MPPT) technique and regulation efficiency optimizer, the PMU achieves a peak MPPT efficiency of 98.5% and a peak system overall efficiency of 73.33%. Additionally, the PMU includes an adaptive high-voltage (HV) charging stage that charges the stimulation capacitor up to 12 V with an improved efficiency of 37.88%.
- 7 November 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 61 (3) , 925-936
An Efficient Power Management Unit With Continuous MPPT and Energy Recycling for Wireless Millimetric Biomedical Implants
Biomedical implants offer transformative tools to improve medical outcomes. To realize minimally invasive implants with miniaturized volume and weight, wireless power transfer (WPT) has been extensively studied to replace bulky batteries that dominate the volume of traditional implants and require surgical replacements. Ultrasonic (US) and magnetoelectric (ME) WPT modalities, which leverage low-frequency acoustic–electrical coupling for energy transduction, become viable solutions for millimeter-scale receivers (RXs). This work presents a fully integrated power management unit (PMU) for ME WPT in millimetric implants. The PMU achieves load-independent maximum power extraction and usage by continuously matching the transducer’s impedance, dynamically optimizing the power stage across varying input/load conditions, and reusing the storage energy to sustain the system when input power drops. Its parallel-input regulation and storing stages architecture prevents the cascading power loss. With the skewed-duty-cycle maximum power point tracking (MPPT) technique and regulation efficiency optimizer, the PMU achieves a peak MPPT efficiency of 98.5% and a peak system overall efficiency of 73.33%. Additionally, the PMU includes an adaptive high-voltage (HV) charging stage that charges the stimulation capacitor up to 12 V with an improved efficiency of 37.88%.
- Open Access
- 3 November 2025
- Published by Association for Computing Machinery (ACM)
- p. 1151-1165
Dual-Resonance Magnetoelectric Power and Data Links for Miniaturized Wireless Bio-Implants
- 3 November 2025
- Published by Association for Computing Machinery (ACM)
- p. 1151-1165
Open AccessDual-Resonance Magnetoelectric Power and Data Links for Miniaturized Wireless Bio-Implants
- 1 October 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Power Electronics
- Vol. 41 (4) , 5905-5915
A Self-Regulating Bias-Flip Rectifier for Piezoelectric Energy Harvesting
Piezoelectric energy harvesting (PEH) efficiently converts ambient kinetic energy into electrical power, enabling sustainable, and autonomous operation of low-power electronic devices. To optimize power extraction, maximum power point tracking (MPPT) methods are commonly employed. Conventional MPPT approaches, such as perturb-and-observe and fractional open-circuit voltage, typically rely on incremental power measurements or theoretical voltage estimations, but suffer from high power overhead, slow convergence, and circuit complexity. Duty-cycle-based MPPT techniques partly overcome these limitations by regulating the rectifier’s duty cycle at 50%, yet they still require a dedicated MPPT stage and large external capacitors, causing additional power loss and delayed convergence. To address these challenges, this article presents a self-regulating bias-flip rectifier that inherently integrates rectification and MPPT into a single stage, eliminating cascaded energy losses and enabling rapid convergence to the maximum power point. Fabricated in a 0.18-$\,{\mu }{\mathrm{m}}$ CMOS process, the proposed rectifier achieves an end-to-end efficiency of 93%, MPPT efficiency of 98%, and provides a 7.7-fold improvement in energy extraction compared to conventional full-bridge rectifiers.
- 1 October 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Power Electronics
- Vol. 41 (4) , 5905-5915
A Self-Regulating Bias-Flip Rectifier for Piezoelectric Energy Harvesting
Piezoelectric energy harvesting (PEH) efficiently converts ambient kinetic energy into electrical power, enabling sustainable, and autonomous operation of low-power electronic devices. To optimize power extraction, maximum power point tracking (MPPT) methods are commonly employed. Conventional MPPT approaches, such as perturb-and-observe and fractional open-circuit voltage, typically rely on incremental power measurements or theoretical voltage estimations, but suffer from high power overhead, slow convergence, and circuit complexity. Duty-cycle-based MPPT techniques partly overcome these limitations by regulating the rectifier’s duty cycle at 50%, yet they still require a dedicated MPPT stage and large external capacitors, causing additional power loss and delayed convergence. To address these challenges, this article presents a self-regulating bias-flip rectifier that inherently integrates rectification and MPPT into a single stage, eliminating cascaded energy losses and enabling rapid convergence to the maximum power point. Fabricated in a 0.18-$\,{\mu }{\mathrm{m}}$ CMOS process, the proposed rectifier achieves an end-to-end efficiency of 93%, MPPT efficiency of 98%, and provides a 7.7-fold improvement in energy extraction compared to conventional full-bridge rectifiers.
- 16 September 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 60 (11) , 3895-3907
Compressive Sensing Photoacoustic Imaging Receiver With Matrix-Vector-Multiplication SAR ADC
Wearable photoacoustic imaging devices hold great promise for continuous health monitoring and point-of-care diagnostics. However, the large data volume generated by high-density transducer arrays presents a major challenge for realizing compact and power-efficient wearable systems. This article presents a photoacoustic imaging receiver (RX) that embeds compressive sensing directly into the hardware to address this bottleneck. The RX integrates 16 AFEs and four matrix-vector-multiplication (MVM) SAR ADCs that perform energy- and area-efficient analog-domain compression. The architecture achieves a $4\times $ – $8\times $ reduction in output data rate while preserving low-loss full-array information. The MVM SAR ADC executes passive and accurate MVM using user-defined programmable ternary weights. Two signal reconstruction methods are implemented: 1) an optimization approach using the fast iterative shrinkage-thresholding algorithm and 2) a learning-based approach employing implicit neural representation. Fabricated in 65-nm CMOS, the chip achieves an ADC’s signal-to-noise-distortion ratio (SNDR) of 57.5 dB at 20.41 MS/s, with an analog front-end (AFE) input-referred noise of 3.5 nV/ $\mathbf {(\text {Hz})^{1/2}}$ . MVM linearity measurements show $R^{2} \gt 0.999$ across a wide range of weights and input amplitudes. The system is validated through phantom imaging experiments, demonstrating high-fidelity image reconstruction under up to $8\times $ compression. The RX consumes 5.83 mW/channel and supports a general ternary-weighted measurement matrix, offering a compelling solution for next-generation miniaturized, wearable PA imaging systems.
- 16 September 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 60 (11) , 3895-3907
Compressive Sensing Photoacoustic Imaging Receiver With Matrix-Vector-Multiplication SAR ADC
Wearable photoacoustic imaging devices hold great promise for continuous health monitoring and point-of-care diagnostics. However, the large data volume generated by high-density transducer arrays presents a major challenge for realizing compact and power-efficient wearable systems. This article presents a photoacoustic imaging receiver (RX) that embeds compressive sensing directly into the hardware to address this bottleneck. The RX integrates 16 AFEs and four matrix-vector-multiplication (MVM) SAR ADCs that perform energy- and area-efficient analog-domain compression. The architecture achieves a $4\times $ – $8\times $ reduction in output data rate while preserving low-loss full-array information. The MVM SAR ADC executes passive and accurate MVM using user-defined programmable ternary weights. Two signal reconstruction methods are implemented: 1) an optimization approach using the fast iterative shrinkage-thresholding algorithm and 2) a learning-based approach employing implicit neural representation. Fabricated in 65-nm CMOS, the chip achieves an ADC’s signal-to-noise-distortion ratio (SNDR) of 57.5 dB at 20.41 MS/s, with an analog front-end (AFE) input-referred noise of 3.5 nV/ $\mathbf {(\text {Hz})^{1/2}}$ . MVM linearity measurements show $R^{2} \gt 0.999$ across a wide range of weights and input amplitudes. The system is validated through phantom imaging experiments, demonstrating high-fidelity image reconstruction under up to $8\times $ compression. The RX consumes 5.83 mW/channel and supports a general ternary-weighted measurement matrix, offering a compelling solution for next-generation miniaturized, wearable PA imaging systems.
- 11 October 2024
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 59 (11) , 3599-3611
Omnidirectional Wireless Power Transfer for Millimetric Magnetoelectric Biomedical Implants
Miniature bioelectronic implants promise revolutionary therapies for cardiovascular and neurological disorders. Wireless power transfer (WPT) is a significant method for miniaturization, eliminating the need for bulky batteries in today’s devices. Despite successful demonstrations of millimetric battery-free implants in animal models, the robustness and efficiency of WPT are known to degrade significantly under misalignment incurred by body movements, respiration, heart beating, and limited control of implant orientation during surgery. This article presents an omnidirectional WPT platform for millimetric bioelectronic implants, employing the emerging magnetoelectric (ME) WPT modality, and “magnetic field steering” technique based on multiple transmitter (TX) coils. To accurately sense the weak coupling in a miniature implant and adaptively control the multicoil TX array in a closed loop, we develop an active echo (AE) scheme using a tiny coil on the implant. Our prototype comprises a fully integrated 14.2 mm3 implantable stimulator embedding a custom low-power system-on-chip (SoC) powered by an ME film, a TX with a custom three-channel AE RX chip, and a multicoil TX array with mutual inductance cancellation. The AE RX achieves −161 dBm/Hz input-referred noise with 64 dB gain tuning range to reliably sense the AE signal, and offers fast polarity detection for driver control. AE simultaneously enhances the robustness, efficiency, and charging range of ME WPT. Under 90° rotation from the ideal position, our omnidirectional WPT system achieves $6.8{ \times }$ higher power transfer efficiency (PTE) than a single-coil baseline. The tracking error of AE negligibly degrades the PTE by less than 2% from using ideal control.
- 11 October 2024
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 59 (11) , 3599-3611
Omnidirectional Wireless Power Transfer for Millimetric Magnetoelectric Biomedical Implants
Miniature bioelectronic implants promise revolutionary therapies for cardiovascular and neurological disorders. Wireless power transfer (WPT) is a significant method for miniaturization, eliminating the need for bulky batteries in today’s devices. Despite successful demonstrations of millimetric battery-free implants in animal models, the robustness and efficiency of WPT are known to degrade significantly under misalignment incurred by body movements, respiration, heart beating, and limited control of implant orientation during surgery. This article presents an omnidirectional WPT platform for millimetric bioelectronic implants, employing the emerging magnetoelectric (ME) WPT modality, and “magnetic field steering” technique based on multiple transmitter (TX) coils. To accurately sense the weak coupling in a miniature implant and adaptively control the multicoil TX array in a closed loop, we develop an active echo (AE) scheme using a tiny coil on the implant. Our prototype comprises a fully integrated 14.2 mm3 implantable stimulator embedding a custom low-power system-on-chip (SoC) powered by an ME film, a TX with a custom three-channel AE RX chip, and a multicoil TX array with mutual inductance cancellation. The AE RX achieves −161 dBm/Hz input-referred noise with 64 dB gain tuning range to reliably sense the AE signal, and offers fast polarity detection for driver control. AE simultaneously enhances the robustness, efficiency, and charging range of ME WPT. Under 90° rotation from the ideal position, our omnidirectional WPT system achieves $6.8{ \times }$ higher power transfer efficiency (PTE) than a single-coil baseline. The tracking error of AE negligibly degrades the PTE by less than 2% from using ideal control.
- 25 September 2024
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Biomedical Circuits and Systems
- Vol. 18 (6) , 1197-1208
A Miniature Batteryless Bioelectronic Implant Using One Magnetoelectric Transducer for Wireless Powering and PWM Backscatter Communication
Wireless minimally invasive bioelectronic implants enable a wide range of applications in healthcare, medicine, and scientific research. Magnetoelectric (ME) wireless power transfer (WPT) has emerged as a promising approach for powering miniature bio-implants because of its remarkable efficiency, safety limit, and misalignment tolerance. However, achieving low-power and high-quality uplink communication using ME remains a challenge. This paper presents a pulse-width modulated (PWM) ME backscatter uplink communication enabled by a switched-capacitor energy extraction (SCEE) technique. The SCEE rapidly extracts and dissipates the kinetic energy within the ME transducer during its ringdown period, enabling time-domain PWM in ME backscatter. Various circuit techniques are presented to realize SCEE with low power consumption. This paper also describes the high-order modeling of ME transducers to facilitate the design and analysis, which shows good matching with measurement. Our prototyping system includes a millimeter-scale ME implant with a fully integrated system-on-chip (SoC) and a portable transceiver for power transfer and bidirectional communication. SCEE is proven to induce >50% amplitude reduction within 2 ME cycles, leading to a PWM ME backscatter uplink with 17.73 kbps data rate and 0.9 pJ/bit efficiency. It also achieves 8.5 × 10 -5 bit-error-rate (BER) at a 5 cm distance, using a lightweight multi-layer-perception (MLP) decoding algorithm. Finally, the system demonstrates continuous wireless neural local-field potential (LFP) recording in an in vitro setup.
- 25 September 2024
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Biomedical Circuits and Systems
- Vol. 18 (6) , 1197-1208
A Miniature Batteryless Bioelectronic Implant Using One Magnetoelectric Transducer for Wireless Powering and PWM Backscatter Communication
Wireless minimally invasive bioelectronic implants enable a wide range of applications in healthcare, medicine, and scientific research. Magnetoelectric (ME) wireless power transfer (WPT) has emerged as a promising approach for powering miniature bio-implants because of its remarkable efficiency, safety limit, and misalignment tolerance. However, achieving low-power and high-quality uplink communication using ME remains a challenge. This paper presents a pulse-width modulated (PWM) ME backscatter uplink communication enabled by a switched-capacitor energy extraction (SCEE) technique. The SCEE rapidly extracts and dissipates the kinetic energy within the ME transducer during its ringdown period, enabling time-domain PWM in ME backscatter. Various circuit techniques are presented to realize SCEE with low power consumption. This paper also describes the high-order modeling of ME transducers to facilitate the design and analysis, which shows good matching with measurement. Our prototyping system includes a millimeter-scale ME implant with a fully integrated system-on-chip (SoC) and a portable transceiver for power transfer and bidirectional communication. SCEE is proven to induce >50% amplitude reduction within 2 ME cycles, leading to a PWM ME backscatter uplink with 17.73 kbps data rate and 0.9 pJ/bit efficiency. It also achieves 8.5 × 10 -5 bit-error-rate (BER) at a 5 cm distance, using a lightweight multi-layer-perception (MLP) decoding algorithm. Finally, the system demonstrates continuous wireless neural local-field potential (LFP) recording in an in vitro setup.
- Top Cited Papers
- 13 August 2024
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 60 (1) , 308-320
PICO-RAM: A PVT-Insensitive Analog Compute-In-Memory SRAM Macro With In Situ Multi-Bit Charge Computing and 6T Thin-Cell-Compatible Layout
Analog compute-in-memory (CIM) in static random access memory (SRAM) is promising for accelerating deep learning inference by circumventing the memory wall and exploiting ultra-efficient analog low-precision arithmetic. Latest analog CIM designs attempt bit-parallel (BP) schemes for multi-bit analog matrix-vector multiplication (MVM), aiming at higher energy efficiency, throughput, and training simplicity and robustness over conventional bit-serial (BS) methods that digitally shift-and-add multiple partial analog computing results. However, BP operations require more complex analog computations and become more sensitive to well-known analog CIM challenges, including large cell areas, inefficient and inaccurate multi-bit analog operations, and vulnerability to PVT variations. This article presents PICO-RAM, a PVT-insensitive and compact CIM SRAM macro with charge-domain BP computation. It adopts a multi-bit thin-cell multiply-accumulate (MAC) unit that shares the same transistor layout as the most compact 6T SRAM cell. All analog computing modules, including digital-to-analog converters (DACs), MAC units, analog shift-and-add, and analog-to-digital converters (ADCs), reuse one set of local capacitors inside the array, performing in situ computation to save area and enhance accuracy. A compact 8.5-bit dual-threshold time-domain ADC power gates the main path most of the time, leading to a significant energy reduction. Our 65-nm prototype achieves the highest weight storage density of 559 Kb/mm $^2$ and exceptional robustness to temperature and voltage variations ( $-$ 40 $^\circ$ C to 105 $^{\circ}$ C and 0.65 to 1.2 V) among SRAM-based analog CIM designs.
- 13 August 2024
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 60 (1) , 308-320
Top Cited PapersPICO-RAM: A PVT-Insensitive Analog Compute-In-Memory SRAM Macro With In Situ Multi-Bit Charge Computing and 6T Thin-Cell-Compatible Layout
Analog compute-in-memory (CIM) in static random access memory (SRAM) is promising for accelerating deep learning inference by circumventing the memory wall and exploiting ultra-efficient analog low-precision arithmetic. Latest analog CIM designs attempt bit-parallel (BP) schemes for multi-bit analog matrix-vector multiplication (MVM), aiming at higher energy efficiency, throughput, and training simplicity and robustness over conventional bit-serial (BS) methods that digitally shift-and-add multiple partial analog computing results. However, BP operations require more complex analog computations and become more sensitive to well-known analog CIM challenges, including large cell areas, inefficient and inaccurate multi-bit analog operations, and vulnerability to PVT variations. This article presents PICO-RAM, a PVT-insensitive and compact CIM SRAM macro with charge-domain BP computation. It adopts a multi-bit thin-cell multiply-accumulate (MAC) unit that shares the same transistor layout as the most compact 6T SRAM cell. All analog computing modules, including digital-to-analog converters (DACs), MAC units, analog shift-and-add, and analog-to-digital converters (ADCs), reuse one set of local capacitors inside the array, performing in situ computation to save area and enhance accuracy. A compact 8.5-bit dual-threshold time-domain ADC power gates the main path most of the time, leading to a significant energy reduction. Our 65-nm prototype achieves the highest weight storage density of 559 Kb/mm $^2$ and exceptional robustness to temperature and voltage variations ( $-$ 40 $^\circ$ C to 105 $^{\circ}$ C and 0.65 to 1.2 V) among SRAM-based analog CIM designs.