Weixu Gong
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Research Subjects
Weixu Gong has a total of 7 co-authors. Here are the top co-authors by number of shared publications:
- Junqiao Li
School of Integrated Circuits, Jiangnan University, WuXi 214122, China
1 shared publication - Mengye Cai
School of Integrated Circuits, Jiangnan University, WuXi 214122, China
1 shared publication - Shengcheng Geng
School of Integrated Circuits, Jiangnan University, WuXi 214122, China
1 shared publication - Tian Qiang
School of Integrated Circuits, Jiangnan University, Wuxi, China
1 shared publication - Yanfeng Jiang
Jiangnan University
1 shared publication - Zhengyang Cai
School of Integrated Circuits, Jiangnan University, WuXi 214122, China
1 shared publication
Latest Publications
- Open Access
- 28 July 2025
- Published by MDPI AG in Nanomaterials
- Vol. 15 (15) , 1168
Scaling, Leakage Current Suppression, and Simulation of Carbon Nanotube Field-Effect Transistors
Carbon nanotube field-effect transistors (CNTFETs) are becoming a strong competitor for the next generation of high-performance, energy-efficient integrated circuits due to their near-ballistic carrier transport characteristics and excellent suppression of short-channel effects. However, CNT FETs with large diameters and small band gaps exhibit obvious bipolarity, and gate-induced drain leakage (GIDL) contributes significantly to the off-state leakage current. Although the asymmetric gate strategy and feedback gate (FBG) structures proposed so far have shown the potential to suppress CNT FET leakage currents, the devices still lack scalability. Based on the analysis of the conduction mechanism of existing self-aligned gate structures, this study innovatively proposed a design strategy to extend the length of the source–drain epitaxial region (Lext) under a vertically stacked architecture. While maintaining a high drive current, this structure effectively suppresses the quantum tunneling effect on the drain side, thereby reducing the off-state leakage current (Ioff = 10−10 A), and has good scaling characteristics and leakage current suppression characteristics between gate lengths of 200 nm and 25 nm. For the sidewall gate architecture, this work also uses single-walled carbon nanotubes (SWCNTs) as the channel material and uses metal source and drain electrodes with good work function matching to achieve low-resistance ohmic contact. This solution has significant advantages in structural adjustability and contact quality and can significantly reduce the off-state current (Ioff = 10−14 A). At the same time, it can solve the problem of off-state current suppression failure when the gate length of the vertical stacking structure is 10 nm (the total channel length is 30 nm) and has good scalability.
- 28 July 2025
- Published by MDPI AG in Nanomaterials
- Vol. 15 (15) , 1168
Open AccessScaling, Leakage Current Suppression, and Simulation of Carbon Nanotube Field-Effect Transistors
Carbon nanotube field-effect transistors (CNTFETs) are becoming a strong competitor for the next generation of high-performance, energy-efficient integrated circuits due to their near-ballistic carrier transport characteristics and excellent suppression of short-channel effects. However, CNT FETs with large diameters and small band gaps exhibit obvious bipolarity, and gate-induced drain leakage (GIDL) contributes significantly to the off-state leakage current. Although the asymmetric gate strategy and feedback gate (FBG) structures proposed so far have shown the potential to suppress CNT FET leakage currents, the devices still lack scalability. Based on the analysis of the conduction mechanism of existing self-aligned gate structures, this study innovatively proposed a design strategy to extend the length of the source–drain epitaxial region (Lext) under a vertically stacked architecture. While maintaining a high drive current, this structure effectively suppresses the quantum tunneling effect on the drain side, thereby reducing the off-state leakage current (Ioff = 10−10 A), and has good scaling characteristics and leakage current suppression characteristics between gate lengths of 200 nm and 25 nm. For the sidewall gate architecture, this work also uses single-walled carbon nanotubes (SWCNTs) as the channel material and uses metal source and drain electrodes with good work function matching to achieve low-resistance ohmic contact. This solution has significant advantages in structural adjustability and contact quality and can significantly reduce the off-state current (Ioff = 10−14 A). At the same time, it can solve the problem of off-state current suppression failure when the gate length of the vertical stacking structure is 10 nm (the total channel length is 30 nm) and has good scalability.