Lei Yang

With the development of electric vehicles, permanent magnet synchronous motor with hairpin winding is gradually becoming popular. Because of the large cross-sectional area of hairpin winding, the skin effect and proximity effect lead to large eddy current loss, especially at high frequencies. The AC loss of end winding cannot be ignored. Conductors with different phases overlap each other at wave-wound hairpin end winding. The phase difference between windings affects the eddy current loss. It is necessary to accurately calculate the AC loss of the wave-wound hairpin end winding. The analytical method and three-dimensional finite element method are difficult and time-consuming. This article analyzes the influence factors of the AC loss of end winding. An AC loss calculation method for wave-wound hairpin end winding that considers the phase difference and winding gaps is proposed. The proposed method is based on the two-dimensional finite element method, which saves calculation time. An experimental method is proposed to separate copper loss and iron loss. The AC loss experimental results show that the error between the proposed method and experiment is less than 2% at high frequency.

Grid‐connected inverters (GCIs) typically employ a phase‐locked loop (PLL) to achieve synchronization with the grid, whereas voltage feedforward is used to mitigate grid voltage disturbances and improve current quality. In weak grids, however, the interaction between these control loops may degrade stability. To this end, an output impedance model of the GCI that incorporates both the PLL and voltage feedforward is established, and their impact on system stability is systematically analyzed. Accordingly, a voltage feedforward structure with phase‐lead compensation is proposed. Through appropriate parameter design, the system phase characteristics are improved while harmonic suppression capability is maintained. Nevertheless, as the grid impedance continues to increase, using only the proposed voltage feedforward provides limited improvement in stability. Therefore, a reconfigured PLL with an all‐pass filter (RPLL‐APF) is introduced to further enhance system stability. Experimental results demonstrate that the coordinated design of the PLL and voltage feedforward enables stable operation and maintains satisfactory current quality over a wide range of grid impedance variations.

Owing to the stringent reliability requirements of silicon carbide (SiC) MOSFETs, conventional gate-driving methods with fixed parameters are no longer sufficient to ensure reliable operation under varying operating conditions. To address this issue, this study proposes an adaptive gate-driving method based on model prediction dealing with operating conditions. First, the influence of operating conditions on crosstalk is comprehensively analyzed, starting with an explanation of the crosstalk mechanism. Then, a two-variable behavioral model is established to estimate the amplitude of the crosstalk voltage under the specified operating condition. Based on this prediction model, a lightweight optimization algorithm is developed to select the negative gate turn-off voltage according to the operating conditions. Finally, a double-pulse test platform is built to validate the proposed dynamic gate-voltage selection strategy. The experimental results show that, compared with the fixed −3 V turn-off voltage scheme, the proposed method selects the optimal turn-off voltage of −2 V under specific operating conditions, which can reduce unnecessary negative gate-voltage stress while maintaining the gate-source voltage within the allowable range. Additionally, the measured turn-off loss of the proposed method is 172.7 μJ, lower than the 222.3 μJ loss of the parallel gate-source capacitance method, indicating a better trade-off between crosstalk suppression and switching loss. The proposed behavioral model requires only 69.5 microseconds to predict positive and negative crosstalk peaks, whereas the analytical model requires 46.6 milliseconds. The low computational burden makes the proposed method suitable for potential real-time implementation on resource-constrained microcontrollers.

In AC motor field-oriented control systems, employing a single DC-bus current sensor with a phase-shifting strategy can effectively reduce system complexity and hardware costs. The vector-symmetry-based phase shift (VSPS) strategy has been shown to offer advantages in extending the linear modulation range and reducing the total harmonic distortion (THD) of phase currents. However, the harmonic suppression mechanism and the effective operating region of this method remain unclear. To fill this theoretical gap, this article develops a time-domain current ripple model for the VSPS method, analyzes the relationship between ripple distribution and vector symmetry, and reveals that VSPS reduces the root-mean-square value of the current ripple through improved PWM waveform symmetry. Furthermore, the boundary conditions under which VSPS can effectively reduce THD over a range of modulation indices are derived. Simulation results validate the correctness of the theoretical model. Experimental results show that the variation trend in the THD difference between VSPS and conventional phase shift compensation with modulation index agrees with the theoretical predictions, although the numerical improvement is relatively small. This work provides a theoretical basis and practical guidance for the engineering application of the VSPS method.

Stator winding reconfiguration technology has attracted increasing attention because it can modify the torque–speed output characteristics of motors online and extend the high-efficiency operating region. However, conventional winding switching methods suffer from several limitations, including long transient duration, typically at the millisecond level; difficulty in precise control; current interruption or asymmetric operation during the transient process; and the resulting torque loss and torque fluctuation. To address these issues, this paper first proposes a seamless winding switching method. The core idea is to complete the switching within the zero-vector interval of a single SVPWM period, thereby eliminating potential surge voltage without requiring a snubber circuit. The proposed method reduces the transient duration to only 5 μs, eliminates current interruption and current asymmetry, and suppresses the associated torque ripple. Furthermore, a deadbeat predictive control strategy is employed. By directly controlling the voltage vector, the proposed strategy enables fast and accurate current tracking within one sampling period after reconfiguration, thereby avoiding current overshoot, oscillation, and the corresponding torque and speed fluctuations. In addition, a voltage feedforward compensation method is proposed to pre-compensate the voltage applied during the PWM period in which the winding reconfiguration is performed, thereby preventing the application of voltage vectors that are inconsistent with the actual motor winding connection. With these three innovative measures, fast, smooth, and robust winding reconfiguration is achieved. The mechanisms and implementation procedures of the proposed strategies are described in detail, and their feasibility and effectiveness are verified through experiments.

Accurately assessing the remaining useful life (RUL) is a significant challenge to the reliability of Silicon Carbide (SiC) MOSFETs and is crucial for their safe operation. Consequently, this paper proposes a novel data-driven prediction method that integrates Successive Variational Mode Decomposition (SVMD), the Sparrow Search Algorithm (SSA), and the Transformer model. The threshold voltage V_th is selected as the degradation parameter for prediction. Firstly, SVMD is utilized to decompose the original V_th data into a degradation trend component and several fluctuation components with different central frequencies, thereby providing a more precise feature for prediction models. Subsequently, based on the Transformer model, trend predictions are conducted on each intrinsic mode function (IMF) derived from SVMD, and these results are aggregated as the final predicted value of V_th. The hyperparameters of the Transformer are optimized using SSA to enhance prediction accuracy. Ultimately, a power cycling platform is constructed to acquire the dataset of the device, where the device is subjected to rated current and 80 °C junction temperature fluctuation stress during testing. Building upon this, the difference between the number of cycles when V_th reaches its upper limit and the current number of cycles is determined as the predicted RUL value. Results demonstrate that compared to both a single Transformer model and the SVMD-Transformer model, the proposed method achieves a higher coefficient of determination (R²) and a lower root mean square error (RMSE), indicating superior prediction performance.

To improve the power density of permanent magnet synchronous motors (PMSM) for electric vehicles, round wire winding is gradually replaced by flat wire winding. The large cross-sectional area of the flat wire winding causes significant AC loss and temperature. AC loss includes the eddy current loss and DC loss. The eddy current loss in the high-frequency region needs to be suppressed, and the slot fill rate needs to be guaranteed to suppress the DC loss in the high-torque region. The loss distribution of different layer windings is affected by the distribution of magnetic leakage in the slot. The magnetic leakage is generated by the joint action of armature current and the permanent magnet. Based on the analysis of the causes of AC loss in different layers under various working conditions, this paper proposed the layered loss suppression method (LLSM). The novel hybrid-cross-section flat wire winding (HCSW) is proposed based on the LLSM and verified by experiments. Results show that the loss of HCSW is reduced by 21.4% in peak speed working condition and the slot fill rate is guaranteed. The area of the high efficiency region is increased by 11% compared with the original model.