Jiaxuan Sheng
Jiaxuan Sheng has a total of 3 co-authors. Here are the top co-authors by number of shared publications:
Jun Wu
1 shared publicationLiping Liu
1 shared publicationZhao Ding
1 shared publication
Latest Publications
- Open Access
- 30 October 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in TechRxiv
Achieving 2.5µs Current Loop for PMSM control via a High-Performance Dual-Core Framework on a Low-Cost MCU
The increasing utilization of motor applications with high fundamental frequencies imposes demanding requirements on the performance of the current control loop. This paper proposes an efficient dual-core parallel Field-Oriented Control (FOC) software framework and a mixed-order Taylor series expansion-based rotational matrix interpolation method. Achieved purely through software optimization, without reliance on dedicated hardware accelerators such as Field-Programmable Gate Arrays (FPGAs), the proposed framework successfully realizes an ultra-high-speed current loop control with a 2.5µs execution time on the low-cost ESP32 microcontroller. Furthermore, the mixed-order interpolation method effectively reduces computational overhead while simultaneously mitigating the current vector distortion caused by an excessively low position sampling rate. The efficacy of this software framework has been validated through testing on an ESP32-based brushless motor actuator, demonstrating the significant potential of utilizing a lowcost commercial dual-core Microcontroller Unit (MCU) for ultrahigh-frequency current loop control. This work provides a costeffective, high-performance solution for advanced motor drive applications.
- 30 October 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in TechRxiv
Open AccessAchieving 2.5µs Current Loop for PMSM control via a High-Performance Dual-Core Framework on a Low-Cost MCU
The increasing utilization of motor applications with high fundamental frequencies imposes demanding requirements on the performance of the current control loop. This paper proposes an efficient dual-core parallel Field-Oriented Control (FOC) software framework and a mixed-order Taylor series expansion-based rotational matrix interpolation method. Achieved purely through software optimization, without reliance on dedicated hardware accelerators such as Field-Programmable Gate Arrays (FPGAs), the proposed framework successfully realizes an ultra-high-speed current loop control with a 2.5µs execution time on the low-cost ESP32 microcontroller. Furthermore, the mixed-order interpolation method effectively reduces computational overhead while simultaneously mitigating the current vector distortion caused by an excessively low position sampling rate. The efficacy of this software framework has been validated through testing on an ESP32-based brushless motor actuator, demonstrating the significant potential of utilizing a lowcost commercial dual-core Microcontroller Unit (MCU) for ultrahigh-frequency current loop control. This work provides a costeffective, high-performance solution for advanced motor drive applications.