Zerui Jin

The simulation-to-real gap between idealized TCAD simulations and experimental data from fabricated devices limits the accuracy of data-driven modeling for semiconductor devices. This work proposes a Physics Aware Jacobian Calibration (PAJC) framework to improve neural network (NN) surrogate modeling of LDMOS devices under sparse experimental supervision. A Physics Prior Model (PPM) trained on large scale TCAD simulations provides first order response sensitivities through its Jacobian matrix, enabling corrections from a small set of experimental anchor samples to propagate across the design space. Using the corrected simulation data together with experimental samples, a Calibrated Proxy Model (CPM) is constructed for device performance prediction. Experimental results on LDMOS devices show that the CPM achieves an average Mean Absolute Percentage Error (MAPE) of 2.28% on an unseen experimental test set while preserving physically consistent trends between design parameters and device performance. The proposed framework provides a scalable approach for physics informed AI assisted semiconductor modeling under realistic process variations.

Data-driven modeling of etching processes allows for the accurate prediction of etch profiles significantly enhancing the efficiency of IC research. In this study, a convolutional Transformer based etching network (CTransE) is developed to extract multi-scale features from etching profiles, enabling accurate modeling and prediction under variable process conditions. Recognizing that etching profile evolution is a physically constrained, long-sequence task, the model exploits the standard Transformer architecture to effectively capture cross-timestep dependencies in physical image sequences through self-attention mechanism. We specifically employed the CTransE model for the etching of SiO2 using Ar/CF4 gas mixtures using a simulated dataset of 18,360 2D profiles and a few-shot experimental dataset. Compared to conventional RNN or LSTM, CTransE model reduces the mean squared error (MSE) by 93.15% and improves the structural similarity index measure (SSIM) by 29.02%, enabling accurate predictions of real-world experimental profiles. The inference time for a single profile is 0.13 s, significantly speedup the prediction efficiency of temporal etching processes. The proposed method delivers a fast, robust, and low-cost strategy for monitoring plasma etching in small-node IC fabrication.