A 475-nW Area-Efficient Programmable Analog Feature Extraction Filterbank for Audio Classification

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Abstract
Audio classification in edge devices has many applications and can be implemented at varying levels of complexity, typically consisting of a feature extractor followed by a classifier. Such devices are often always-on, constantly listening to their surroundings, and have a small form factor; therefore, they require low-power operation and high area efficiency. A passive switched-capacitor (SC)-based analog feature extractor (AFEx) is good for programmability and energy efficiency. However, it suffers from area inefficiency due to the large capacitors needed to reduce $kT/C$ noise. To address this issue, a 16-channel analog $N$ -path filterbank with an amplifier and a feedback Miller capacitor is designed, significantly reducing the physical capacitance on chip by a factor of 30 compared to not using a Miller capacitor while achieving the same noise performance, and by a factor of 8 compared to the state-of-the-art (SOTA). The same amplifier also provides gain, eliminating the need for a low-noise amplifier (LNA) at the front end. Each $N$ -path filter uses only two paths with 50% duty-cycled clocks, simplifying clock generation and reducing power consumption. Moreover, all clock frequencies are derived from only a single 32.768-kHz low-power system clock. Using the zero-IF output of the two-path filter for amplitude extraction allows filtering and mixing to be reduced into a single step. The 65-nm low-power CMOS chip consumes 475nW, comparable to other works in the literature. However, this work includes amplification and uses only 12% of the capacitance per channel of other SC-based AFExs, making it more area efficient. The total input-referred noise (IRN) is $120~{\mu }$ VRMS, which is equivalent to a signal-to-noise ratio (SNR) of 18dB for ~1-m speaker–microphone distance. Competitive maximum classification accuracy of 87.2% for keyword spotting (KWS) is achieved, as well as a classification accuracy robustness of >70% for an input voltage range from 1 to ~260mVRMS (~50-dB SNR range) on the Google Speech Command Dataset (GSCD) for a 12-class (ten keywords) detection using a lightweight software classifier.
Funding Information
  • Project Analog Approximate Accelerators (17703)
  • Research open technology programme (OTP) through the Dutch Research Council

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