A Multichannel Programmable High Order Frequency Multiplier for Channel Bonding and Full Duplex Transceivers at 60 GHz Band
Authors:
- 1 August 2020
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 259-262
Abstract
This paper describes a high order programmable frequency multiplier in the 60 GHz band. The circuit implements four chains that can address simultaneously four different frequencies of the IEEE 802.11ay standard and aims to channel bonding, full duplex, or MIMO systems. It is fabricated in a 45nm CMOS PDSOI technology. Each chain consumes 32.6mW and achieves lower than 178fsec of integrated jitter (in the band 10KHz-1.08GHz) for all synthesized frequencies.Keywords
This publication has 5 references indexed in Scilit:
- A 50.1-Gb/s 60-GHz CMOS Transceiver for IEEE 802.11ay With Calibration of LO Feedthrough and I/Q ImbalanceIEEE Journal of Solid-State Circuits, 2019
- A −31dBc integrated-phase-noise 29GHz fractional-N frequency synthesizer supporting multiple frequency bands for backward-compatible 5G using a frequency doubler and injection-locked frequency multipliers2018
- Insights Into Phase-Noise Scaling in Switch-Coupled Multi-Core LC VCOs for E-Band Adaptive Modulation LinksIEEE Journal of Solid-State Circuits, 2017
- A Low-Power Low-Noise mm-Wave Subsampling PLL Using Dual-Step-Mixing ILFD and Tail-Coupling Quadrature Injection-Locked Oscillator for IEEE 802.11adIEEE Journal of Solid-State Circuits, 2016
- A Programmable Frequency Multiplier-by-29 Architecture for Millimeter Wave ApplicationsIEEE Journal of Solid-State Circuits, 2015