Cleavage Fracture of Brittle Semiconductors from the Nanometre to the Centimetre Scale

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Abstract
The objective of this paper is to present the fundamental phenomena occurring during the scribing and subsequent fracturing process usually performed when preparing surfaces of brittle semiconductors. In the first part, an overview of nano‐scratching experiments of different semiconductor surfaces (InP, Si and GaAs) is given. It is shown how phase transformation can occur in Si under a diamond tip, how single dislocations can be induced in InP wafers and how higher scratching load of GaAs wafer leads to the apparition of a crack network below the surface. A nano‐scratching device, inside a scanning electron microscope (SEM), has been used to observe how spalling (crack and detachment of chips) and/or ductile formation of chips may happen at the semiconductor surface. In the second part cleavage experiments are described. The breaking load of thin GaAs (100) wafers is directly related to the presence of initial sharp cracks induced by scratching. By performing finite element modelling (FEM) of samples under specific loading conditions, it is found that the depth of the median crack below the scratch determines quantitatively the onset of crack propagation. By carefully controlling the position and measuring the force during the cleavage, it is demonstrated that crack propagation through a wafer can be controlled. Besides, the influence of the loading configuration on crack propagation and on the cleaved surface quality is explained.

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