A Low Power Digitizer Array With Adaptive Split Current Source for 3-D-Stacked 100 MP High Dynamic Range Imager
- 30 April 2025
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Sensors Journal
- Vol. 25 (12) , 22609-22617
Abstract
The increasing demand for high dynamic range (HDR), power efficiency, and high resolution has driven the adoption of single-exposure dual conversion gain (DCG) techniques. This paper proposes an adaptive split current source to optimize power consumption in single-exposure DCG readouts. By splitting the comparator bias current, the power consumption of the digitizer array can be adaptively optimized based on the conversion gain (CG) of pixel in single-exposure DCG operation. Additional power-saving features including decision-feedback and auto-zeroing (AZ) power-down techniques are also implemented to further improve power efficiency. The proposed digitizer chip was fabricated in a 28 nm CMOS process, achieving a power consumption reduction of 44.5% in comparator. The integral nonlinearity (INL) was measured as +2.67/–2.34 LSB in high conversion gain (HCG) and +2.95/–1.92 LSB in low conversion gain (LCG). The input-referred random noise (RN) values of 2.17 LSB (HCG) and 2.41 LSB (LCG) were measured at an analog gain of 16, corresponding to 93 μVrms and 103 μVrms, respectively. The prototype chip shows a highly competitive figure of merit (FoM) of 2.41 mV∙pJ/pixel/frame.Keywords
Funding Information
- Inha University
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