235–275 GHz (x16) frequency multiplier chains with up to 0 dBm peak output power and low DC power consumption
- 1 June 2014
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 15292517,p. 181-184
Abstract
Wideband x16 multiplier chains targeted for high speed communication and radar applications above 200 GHz are presented in this paper. The x16 topology is based on 4 cascaded Gilbert-cell-based frequency doublers without any hybrids and intermediate drive amplifiers. The low external input frequency (14-17.5 GHz), enables the use of very low-power frequency dividers and also interfacing with commercial synthesisers below 20 GHz. Two versions of the circuit were implemented. Version 1 is a standalone x16 chain and Version 2 is Version 1 plus wideband 3-stage PA. For Version 1, the measured peak output power is -8.5 dBm at 255 GHz with 40 GHz bandwidth (3 dB) and dc power consumption of 0.3 W. For Version 2, the peak output power is 0 dBm at 245 GHz with 30 GHz bandwidth (3 dB) and 0.7 W dc power consumption. These results are single ended on-wafer measurements without dembeding the 2.5 dB loss due to the output pad and balun. The available differential output power, to drive on-chip components like mixers, antennas etc, is -6 dBm for Version 1 and 2.5 dBm for Version 2. Additionally, break out sructures for wideband PAs operating at 240 GHz were characterised. The peak power gain at 240 GHz was 7 and 10 dB for the 3 and 4 stages respectively over a 30 GHz bandwidth. The measured P sat was 5 dBm at 240 GHz.Keywords
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