Silencer! A tool for substrate noise coupling analysis
Authors:
- 23 December 2004
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
Silencer! is a new, fully automated, substrate noise coupling analysis tool that is integrated into the CADENCE DFII design environment. This tool seamlessly enables substrate noise coupling analysis in a standard mixed-signal design flow. IC designers can analyze substrate noise coupling at different levels of hierarchy - from the schematic level to the layout. Examples have been simulated and the results are accurate to within 10% of measured fabricated chips.Keywords
This publication has 6 references indexed in Scilit:
- A comprehensive geometry-dependent macromodel for substrate noise coupling in heavily doped CMOS processes2003
- Analysis and experimental verification of digital substrate noise generation for epi-type substratesIEEE Journal of Solid-State Circuits, 2000
- A scalable substrate noise coupling model for design of mixed-signal IC'sIEEE Journal of Solid-State Circuits, 2000
- Computer-aided design considerations for mixed-signal coupling in RF integrated circuitsIEEE Journal of Solid-State Circuits, 1998
- Modeling and analysis of substrate coupling in integrated circuitsIEEE Journal of Solid-State Circuits, 1996
- Simulation Techniques and Solutions for Mixed-Signal Coupling in Integrated Circuits1995