Optimization of a MOS–IGBT–SCR ESD protection component in smart power SOI technology
Authors:
- H. ArbessHAH. Arbess
- M. BafleurMBM. Bafleur
- D. TrémouillesD. Trémouilles
- M. ZerarkaMZM. Zerarka
- 1 August 2015
- journal article
- Published by Elsevier in Microelectronics Reliability
- Vol. 55 (9-10) , 1476-1480
Abstract
No abstract availableKeywords
Funding Information
- Fondation de Recherche pour l'Aéronautique et l'Espace (027943)
This publication has 4 references indexed in Scilit:
- Combined MOS–IGBT–SCR Structure for a Compact High-Robustness ESD Power Clamp in Smart Power SOI TechnologyIEEE Transactions on Device and Materials Reliability, 2013
- High Holding Voltage Cascoded LVTSCR Structures for 5.5-V Tolerant ESD Protection ClampsIEEE Transactions on Device and Materials Reliability, 2004
- High holding current SCRs (HHI-SCR) for ESD protection and latch-up immune IC operationMicroelectronics Reliability, 2003
- SOI power devicesElectronics & Communication Engineering Journal, 2000