Recent Advancements in FPGA-based LSTM Accelerator
- 21 January 2022
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 1-5
Abstract
In this paper, a review of execution of Long Short-Term Memory Accelerator on FPGA is presented. The paper starts with a brief overview on the significance of LSTM accelerators, historical background and general structure of LSTM accelerators. Then recent works in this area are highlighted. The research in this domain is focused on modifying the architecture of LSTM to overlap the computation of different stages in the network. This yields less power and higher performance as compared to the corresponding software implementation. The implementation on FPGA provides user with the ability to tradeoff resource utilization and speed of operation by adjusting the amount of parallelization for different operation such as vector multiplication and addition. This offers flexibility to adjust the computational load for different FPGA boards.Keywords
This publication has 29 references indexed in Scilit:
- A Power-Efficient Accelerator Based on FPGAs for LSTM Network2017
- Hardware accelerators for recurrent neural networks on FPGA2017
- FP-DNN: An Automated Framework for Mapping Deep Neural Networks onto FPGAs with RTL-HLS Hybrid Templates2017
- ESE2017
- FPGA-based accelerator for long short-term memory recurrent neural networks2017
- An FPGA implementation of a long short-term memory neural network2016
- LSTM: A Search Space OdysseyIEEE Transactions on Neural Networks and Learning Systems, 2016
- Learning Phrase Representations using RNN Encoder–Decoder for Statistical Machine Translation2014
- Recurrent nets that time and count2000
- Long Short-Term MemoryNeural Computation, 1997