Heterogeneous Gene Sequence Alignment System Based on 12-GHz Superconducting Chip

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Abstract
Due to power consumption and speed limitations, the development of CMOS-based large-scale integrated circuits has stagnated in the post-Moore era. While superconducting digital integrated circuit is a promising solution due to its low power consumption and latency. However, the lack of large-scale cryogenic storage units prevents most superconducting chips from being deployed in practical applications. To fully utilize the advantages of superconducting chips and successfully apply them in processing large datasets, we propose a novel heterogeneous processor based on CMOS-based circuits and superconducting chips for processing pattern-matching tasks. In our proposed architecture, a novel communication architecture that enables high-speed, reliable communication between 12GHz superconducting chips and CMOS circuits is proposed. The hardware overhead for high-speed communication in superconducting chips can be minimized by this approach. Additionally, the data communication rate of a single channel can reach 12Gbps. Simultaneously, we present a 12GHz, large-scale superconducting chip with 6286 Josephson Junctions that can perform 16-bit pattern matching using the SIMIT-Nb03 process. We have successfully applied our proposed heterogeneous processor to the gene sequence alignment. The processor that uses only one superconducting chip has a throughput of 1.5 Gbp/s (billion base pairs per second), whereas a processor with two superconducting chips has 3 Gbp/s.
Funding Information
  • National Natural Science Foundation of China (U19A2080)
  • CAS Strategic Leading Science and Technology (XDA27040303, XDB4400000)
  • Strategic Priority Research Program of Chinese Academy of Sciences (XDA18000000)

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