An Early Performance Study of Large-Scale POWER8 SMP Systems

Authors:
  • XLXing Liu
    Xing Liu
  • DBDaniele Buono
    Daniele Buono
  • FCFabio Checconi
    Fabio Checconi
  • JCJee W. Choi
    Jee W. Choi
  • XQXinyu Que
    Xinyu Que
  • FPFabrizio Petrini
    Fabrizio Petrini
  • JGJohn A. Gunnels
    John A. Gunnels
  • JSJeff A. Stuecheli
    Jeff A. Stuecheli
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Abstract
In this paper we evaluate the performance of a large-scale POWER8 symmetric multiprocessor (SMP) system with eight processors. We focus our attention on cache and memory subsystems, analyzing the characteristics that have a direct impact on high-performance computing and analytics applications. We provide insight into the relevant characteristics of the POWER8 processor using a set of micro-benchmarks. We also analyze the POWER8 SMP at the system level using the well-known roofline model. Using the knowledge gained from these micro-benchmarks, we optimize three applications and use them to assess the capabilities of the POWER8 system. The results show that the POWER8 - based SMP system is capable of delivering high performance for a wide range of applications and kernels.

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