A Fast-Timing Simulator for Digital MOS Circuits
Authors:
- D. TsaoDTD. Tsao
- Chin-Fu ChenCCChin-Fu Chen
- 1 October 1986
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Vol. 5 (4) , 536-540
Abstract
No abstract availableKeywords
This publication has 4 references indexed in Scilit:
- Modeling MOS VLSI circuits for transient analysisIEEE Journal of Solid-State Circuits, 1986
- Switch-Level Delay Models for Digital MOS VLSI1984
- The Second Generation MOTIS Mixed-Mode Simulator1984
- MOTIS-An MOS timing simulatorIEEE Transactions on Circuits and Systems, 1975