Cryogenic Temperature Characterization of a 28-nm FD-SOI Dedicated Structure for Advanced CMOS and Quantum Technologies Co-Integration
Open Access
- 31 May 2018
- journal article
- research article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of the Electron Devices Society
- Vol. 6 (1) , 594-600
Abstract
Silicon co-integration offers compelling scaleup opportunities for quantum computing. In this framework, cryogenic temperature is required for the coherence of solid-state quantum devices. This study reports the characterization of an N-MOS quantum-dot dedicated structure below 100 mK. The device under test is built in thin silicon film fabricated with 28 nm high-k metal gate ultra-thin body and ultra-thin buried oxide (UTBB) advanced CMOS technology. The MOS structure is functional with improved performances at cryogenic temperature. The results open new research avenues in CMOS co-integration for quantum computing applications within the FD-SOI platform.Keywords
Funding Information
- Canada First Research Excellence Fund
- National Science Engineering Research Council of Canada
- Fonds de Recherche du Québec Nature et Technologies
This publication has 36 references indexed in Scilit:
- Substrate impact on threshold voltage and subthreshold slope of sub-32 nm ultra thin SOI MOSFETs with thin buried oxide and undoped channelSolid-State Electronics, 2009
- Gate-Defined Quantum Dots in Intrinsic SiliconNano Letters, 2007
- The origin of switching noise in GaAs/AlGaAs lateral gated devicesPhysica E: Low-dimensional Systems and Nanostructures, 2006
- Development of Cryogenic Readout Electronics for Sensitive Far-Infrared DetectorsIEEJ Transactions on Fundamentals and Materials, 2003
- Quantum computation with quantum dotsPhysical Review A, 1998
- Parameter Extraction of MOSFETs Operated at Low TemperatureJournal de Physique IV, 1996
- The cryogenic operation of partially depleted silicon-on-insulator invertersIEEE Transactions on Electron Devices, 1995
- Generalized mobility law for drain current modeling in Si MOS transistors from liquid helium to room temperaturesIEEE Transactions on Electron Devices, 1993
- Assessment of interface state density in silicon metal-oxide-semiconductor transistors at room, liquid-nitrogen, and liquid-helium temperaturesJournal of Applied Physics, 1990
- Transport in the inversion layer of a MOS transistor: use of Kubo-Greenwood formalismJournal of Physics C: Solid State Physics, 1986