FPGA-Based Dual Learning Model for Wheel Speed Sensor Fault Detection in ABS Systems Using HIL Simulations
Open Access
- 23 December 2025
- journal article
- research article
- Published by MDPI AG in Electronics
- Vol. 15 (1) , 58
Abstract
The rapid evolution of modern vehicles into intelligent and interconnected systems presents new complexities in both functional safety and cybersecurity. In this context, ensuring the reliability and integrity of critical sensor data, such as wheel speed inputs for anti-lock brake systems (ABS), is essential. Effective detection of wheel speed sensor faults not only improves functional safety, but also plays a vital role in keeping system resilience against potential cyber–physical threats. Although data-driven approaches have gained popularity for system development due to their ability to extract meaningful patterns from historical data, a major limitation is the lack of diverse and representative faulty datasets. This study proposes a novel dual learning model, based on Temporal Convolutional Networks (TCN), designed to accurately distinguish between normal and faulty wheel speed sensor behavior within a hardware-in-the-loop (HIL) simulation platform implemented on an FPGA. To address dataset limitations, a TruckSim–MATLAB/Simulink co-simulation environment is used to generate realistic datasets under normal operation and eight representative fault scenarios, yielding up to 5000 labeled sequences (balanced between normal and faulty behaviors) at a sampling rate of 60 Hz. Two TCN models are trained independently to learn normal and faulty dynamics, and fault decisions are made by comparing the reconstruction errors (MSE and MAE) of both models, thus avoiding manually tuned thresholds. On a test set of 1000 sequences (500 normal and 500 faulty) from the 5000 sample configuration, the proposed dual TCN framework achieves a detection accuracy of 97.8%, a precision of 96.5%, a recall of 98.2%, and an F1-score of 97.3%, outperforming a single TCN baseline, which achieves 91.4% accuracy and an 88.9% F1-score. The complete dual TCN architecture is implemented on a Xilinx ZCU102 FPGA evaluation kit (AMD, Santa Clara, CA, USA), while supporting real-time inference in the HIL loop. These results demonstrate that the proposed approach provides accurate, low-latency fault detection suitable for safety-critical ABS applications and contributes to improving both functional safety and cyber-resilience of braking systems.Keywords
Funding Information
- Natural Sciences and Engineering Research Council of Canada (999999)
This publication has 22 references indexed in Scilit:
- Explanatory LSTM-AE-Based Anomaly Detection for Time Series Data in Marine TransportationIEEE Access, 2025
- Research on an intelligent fault diagnosis method for nuclear power plants based on ETCN-SSA combined algorithmAnnals of Nuclear Energy, 2024
- Explainable Anomaly Detection: Counterfactual driven What-If Analysis2024
- Comparing Threshold Selection Methods for Network Anomaly DetectionIEEE Access, 2024
- Deep learning in fault detection and diagnosis of building HVAC systems: A systematic review with meta analysisEnergy and AI, 2023
- Smart Metering System Capable of Anomaly Detection by Bi-directional LSTM Autoencoder2022
- Intelligent fault diagnosis of machines with small & imbalanced data: A state-of-the-art review and possible extensionsISA Transactions, 2022
- Predictive maintenance enabled by machine learning: Use cases and challenges in the automotive industryReliability Engineering & System Safety, 2021
- Hierarchical adaptive deep convolution neural network and its application to bearing fault diagnosisMeasurement, 2016
- Hardware-in-the-loop testing for electric vehicle drive applications2012