A Long-Retention-Time 3T Embedded DRAM in 40-nm Bulk CMOS Process With Super-Boosted Write and Three-Reference-Voltage Read Schemes
- 1 January 2026
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Circuits and Systems I: Regular Papers
- Vol. 73 (9) , 1-13
Abstract
No abstract availableFunding Information
- National Key Research and Development Program of China (2019YFB2204800)
- BJSAMT Project (SAMT-QH-KT-22030101)
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